Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / frsr.h

diff --git a/riscv/insns/frsr.h b/riscv/insns/frsr.h
index ef121e391d5535448a1f54d8a1c243df4abda610..4d807693550470e9b7eac3b6c6dbe46e7b92de16 100644 (file)
--- a/riscv/insns/frsr.h
+++ b/riscv/insns/frsr.h
@@ -1,2 +1,2 @@
 require_fp;
-RD = p->get_fsr();
+WRITE_RD(p->get_fsr());