Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fsgnj_s.h

diff --git a/riscv/insns/fsgnj_s.h b/riscv/insns/fsgnj_s.h
index 35609ac41c22f8ab9122688e832555b3c31c3861..4f852b43e1b86c7a580aa93f086c3250db906a15 100644 (file)
--- a/riscv/insns/fsgnj_s.h
+++ b/riscv/insns/fsgnj_s.h
@@ -1,2 +1,2 @@
 require_fp;
-FRD = (FRS1 &~ (uint32_t)INT32_MIN) | (FRS2 & (uint32_t)INT32_MIN);
+WRITE_FRD((FRS1 &~ (uint32_t)INT32_MIN) | (FRS2 & (uint32_t)INT32_MIN));