[sim] add vt stuff

[riscv-isa-sim.git] / riscv / insns / lbst_v.h

diff --git a/riscv/insns/lbst_v.h b/riscv/insns/lbst_v.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..91c8c3a472c6354972526507bf59ac7075f75ecb 100644 (file)
--- a/riscv/insns/lbst_v.h
+++ b/riscv/insns/lbst_v.h
@@ -0,0 +1 @@
+VEC_LOAD(RD, load_int8, RS2);