revamp hwacha; now runs in physical mode

[riscv-isa-sim.git] / riscv / insns / mulhu.h

diff --git a/riscv/insns/mulhu.h b/riscv/insns/mulhu.h
index 17c610d672936fbad51371c46ff89ef9a187a20b..2d6f48c7e6db30d1a4361afc724f37c0f0b5ba77 100644 (file)
--- a/riscv/insns/mulhu.h
+++ b/riscv/insns/mulhu.h
@@ -1,2 +1,4 @@
-require64;
-RD = (uint128_t(RS1) * uint128_t(RS2)) >> 64;
+if(xpr64)
+  WRITE_RD((uint128_t(RS1) * uint128_t(RS2)) >> 64);
+else
+  WRITE_RD(sext32(((uint64_t)(uint32_t)RS1 * (uint64_t)(uint32_t)RS2) >> 32));