WIP. Doesn't work.
[riscv-isa-sim.git] / riscv / insns / or.h
index 07bcac3555c41da7eacc84775e17b7bb4d5830a7..3f2fffc22e2a2ca0ae6663c79f31d27f5cf94ffb 100644 (file)
@@ -1 +1 @@
-RD = RS1 | RS2;
+WRITE_RD(RS1 | RS2);