Update to new privileged spec

[riscv-isa-sim.git] / riscv / insns / sd.h

diff --git a/riscv/insns/sd.h b/riscv/insns/sd.h
index 9364d875bded2d0e951f029efb8cf2cb3cb9d52a..664deb2c95ae5d0ec40a99f1b66d86ea8526c036 100644 (file)
--- a/riscv/insns/sd.h
+++ b/riscv/insns/sd.h
@@ -1,2 +1,2 @@
-require_xpr64;
+require_rv64;
 MMU.store_uint64(RS1 + insn.s_imm(), RS2);