Make IRQ_COP read-only/undelegable unless coprocessor is present

[riscv-isa-sim.git] / riscv / insns / slliw.h

diff --git a/riscv/insns/slliw.h b/riscv/insns/slliw.h
index 1f6e50dfb52195764c2d1aa21b504874f4073279..c1fda656c25093edc5ee67b430dcf9665545ba2d 100644 (file)
--- a/riscv/insns/slliw.h
+++ b/riscv/insns/slliw.h
@@ -1,2 +1,2 @@
-require_xpr64;
-RD = sext32(RS1 << SHAMTW);
+require_rv64;
+WRITE_RD(sext32(RS1 << SHAMT));