WIP. Doesn't work.
[riscv-isa-sim.git] / riscv / insns / slt.h
index 6511f42c838485013e8034f473fd034cc5d98597..25ccd45ee8958be21ae69f8507705032ec9fad1b 100644 (file)
@@ -1 +1 @@
-RDR = sreg_t(cmp_trunc(RS1)) < sreg_t(cmp_trunc(RS2));
+WRITE_RD(sreg_t(RS1) < sreg_t(RS2));