[opcodes, sim, xcc] made *w insns illegal in RV32

[riscv-isa-sim.git] / riscv / insns / sra.h

diff --git a/riscv/insns/sra.h b/riscv/insns/sra.h
index ef43a4e327bc75e6538176a52dadd93e80a893ae..8bbdc0972147b42611b16bbaa677b3737529e5c0 100644 (file)
--- a/riscv/insns/sra.h
+++ b/riscv/insns/sra.h
@@ -1 +1 @@
-RD = sext32(sreg_t(RT) >> SHAMT);
+RD = sext_xprlen(sreg_t(RS1) >> (RS2 & (xprlen-1)));