Update README

[riscv-isa-sim.git] / riscv / insns / sub.h

diff --git a/riscv/insns/sub.h b/riscv/insns/sub.h
index e7ac407639435d582f7aa08ad9b08a27e0d19e54..9ed48f7449061acd822a616d24fb8b16303cb13b 100644 (file)
--- a/riscv/insns/sub.h
+++ b/riscv/insns/sub.h
@@ -1,2 +1 @@
-require64;
-RC = RA - RB;
+WRITE_RD(sext_xlen(RS1 - RS2));