[sim, xcc] changed cvt/trunc to use GPRs for int args
[riscv-isa-sim.git] / riscv / insns / truncu_w_s.h
index d85f9e5a93562708b6e33e2f979a91344b3de375..2014c2bd003d2d8710c3cb79c59261e61c06a4f5 100644 (file)
@@ -1,3 +1,3 @@
 require_fp;
-FRDR = f32_to_ui32_r_minMag(FRS1,true);
+RDR = f32_to_ui32_r_minMag(FRS1,true);
 set_fp_exceptions;