[sim] add vt stuff

[riscv-isa-sim.git] / riscv / insns / utidx.h

diff --git a/riscv/insns/utidx.h b/riscv/insns/utidx.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..70336acd0f04c7bcd7e3ae5d2036093222534d00 100644 (file)
--- a/riscv/insns/utidx.h
+++ b/riscv/insns/utidx.h
@@ -0,0 +1 @@
+RD = utidx;