Fix stack overflow and support --rbb-port=0
[riscv-isa-sim.git] / riscv / jtag_dtm.cc
index 2605001f7e9451e63451f235c7ebc3625639659b..3750f9db8a9c472a3d74bbfd425d2a304f469080 100644 (file)
@@ -39,6 +39,7 @@ enum {
 
 jtag_dtm_t::jtag_dtm_t(debug_module_t *dm) :
   dm(dm),
+  _tck(false), _tms(false), _tdi(false), _tdo(false),
   dtmcontrol((abits << DTM_DTMCONTROL_ABITS_OFFSET) | 1),
   dbus(DBUS_OP_STATUS_FAILED << DTM_DBUS_OP_OFFSET),
   state(TEST_LOGIC_RESET)