Narrow the interface used by the processors and memory to the top-level simulator...

[riscv-isa-sim.git] / riscv / mmu.cc

diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index 5f054db64239214a3bd14b7ea238dc229accc839..eca8a8339968ef6880cba51dd08272b85a2e72a0 100644 (file)
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -4,7 +4,7 @@
 #include "sim.h"
 #include "processor.h"
 
-mmu_t::mmu_t(sim_t* sim, processor_t* proc)
+mmu_t::mmu_t(simif_t* sim, processor_t* proc)
  : sim(sim), proc(proc),
   check_triggers_fetch(false),
   check_triggers_load(false),