Improve performance for branchy code

[riscv-isa-sim.git] / riscv / mmu.cc

diff --git a/riscv/mmu.cc b/riscv/mmu.cc
index 8b63a43180621e45693c7fc06e7e25b6fa53ef4a..4675f75f61734963054980c6c2c8efa448ff289b 100644 (file)
--- a/riscv/mmu.cc
+++ b/riscv/mmu.cc
@@ -5,8 +5,7 @@
 #include "processor.h"
 
 mmu_t::mmu_t(char* _mem, size_t _memsz)
- : mem(_mem), memsz(_memsz), badvaddr(0),
-   ptbr(0), proc(NULL)
+ : mem(_mem), memsz(_memsz), proc(NULL)
 {
   flush_tlb();
 }
@@ -17,7 +16,8 @@ mmu_t::~mmu_t()
 
 void mmu_t::flush_icache()
 {
-  memset(icache_tag, -1, sizeof(icache_tag));
+  for (size_t i = 0; i < ICACHE_SIZE; i++)
+    icache[i].tag = -1;
 }
 
 void mmu_t::flush_tlb()
@@ -27,33 +27,33 @@ void mmu_t::flush_tlb()
   memset(tlb_store_tag, -1, sizeof(tlb_store_tag));
 
   flush_icache();
-  yield_load_reservation();
 }
 
-reg_t mmu_t::refill_tlb(reg_t addr, reg_t bytes, bool store, bool fetch)
+void* mmu_t::refill_tlb(reg_t addr, reg_t bytes, bool store, bool fetch)
 {
   reg_t idx = (addr >> PGSHIFT) % TLB_ENTRIES;
-  reg_t expected_tag = addr & ~(PGSIZE-1);
+  reg_t expected_tag = addr >> PGSHIFT;
 
   reg_t pte = walk(addr);
 
   reg_t pte_perm = pte & PTE_PERM;
-  if (proc == NULL || (proc->sr & SR_S))
+  if (proc == NULL || (proc->state.sr & SR_S))
     pte_perm = (pte_perm/(PTE_SX/PTE_UX)) & PTE_PERM;
-  pte_perm |= pte & PTE_E;
+  pte_perm |= pte & PTE_V;
 
-  reg_t perm = (fetch ? PTE_UX : store ? PTE_UW : PTE_UR) | PTE_E;
+  reg_t perm = (fetch ? PTE_UX : store ? PTE_UW : PTE_UR) | PTE_V;
   if(unlikely((pte_perm & perm) != perm))
   {
     if (fetch)
-      throw trap_instruction_access_fault;
+      throw trap_instruction_access_fault();
 
-    badvaddr = addr;
-    throw store ? trap_store_access_fault : trap_load_access_fault;
+    if (store)
+      throw trap_store_access_fault(addr);
+    throw trap_load_access_fault(addr);
   }
 
   reg_t pgoff = addr & (PGSIZE-1);
-  reg_t pgbase = pte >> PTE_PPN_SHIFT << PGSHIFT;
+  reg_t pgbase = pte >> PGSHIFT << PGSHIFT;
   reg_t paddr = pgbase + pgoff;
 
   if (unlikely(tracer.interested_in_range(pgbase, pgbase + PGSIZE, store, fetch)))
@@ -63,10 +63,10 @@ reg_t mmu_t::refill_tlb(reg_t addr, reg_t bytes, bool store, bool fetch)
     tlb_load_tag[idx] = (pte_perm & PTE_UR) ? expected_tag : -1;
     tlb_store_tag[idx] = (pte_perm & PTE_UW) ? expected_tag : -1;
     tlb_insn_tag[idx] = (pte_perm & PTE_UX) ? expected_tag : -1;
-    tlb_data[idx] = pgbase;
+    tlb_data[idx] = mem + pgbase - (addr & ~(PGSIZE-1));
   }
 
-  return paddr;
+  return mem + paddr;
 }
 
 pte_t mmu_t::walk(reg_t addr)
@@ -77,14 +77,14 @@ pte_t mmu_t::walk(reg_t addr)
   int shift = 8*sizeof(reg_t) - VA_BITS;
   if (((sreg_t)addr << shift >> shift) != (sreg_t)addr)
     ;
-  else if (proc == NULL || !(proc->sr & SR_VM))
+  else if (proc == NULL || !(proc->state.sr & SR_VM))
   {
     if(addr < memsz)
-      pte = PTE_E | PTE_PERM | ((addr >> PGSHIFT) << PTE_PPN_SHIFT);
+      pte = PTE_V | PTE_PERM | ((addr >> PGSHIFT) << PGSHIFT);
   }
   else
   {
-    reg_t base = ptbr;
+    reg_t base = proc->get_state()->ptbr;
     reg_t ptd;
 
     int ptshift = (LEVELS-1)*PTIDXBITS;
@@ -97,23 +97,23 @@ pte_t mmu_t::walk(reg_t addr)
         break;
 
       ptd = *(pte_t*)(mem+pte_addr);
-      if(ptd & PTE_E)
+
+      if (!(ptd & PTE_V)) // invalid mapping
+        break;
+      else if (ptd & PTE_T) // next level of page table
+        base = (ptd >> PGSHIFT) << PGSHIFT;
+      else // the actual PTE
       {
         // if this PTE is from a larger PT, fake a leaf
         // PTE so the TLB will work right
         reg_t vpn = addr >> PGSHIFT;
-        ptd |= (vpn & ((1<<(ptshift))-1)) << PTE_PPN_SHIFT;
+        ptd |= (vpn & ((1<<(ptshift))-1)) << PGSHIFT;
 
-        // fault if physical addr is invalid
-        reg_t ppn = ptd >> PTE_PPN_SHIFT;
-        if((ppn << PGSHIFT) + (addr & (PGSIZE-1)) < memsz)
+        // fault if physical addr is out of range
+        if (((ptd >> PGSHIFT) << PGSHIFT) < memsz)
           pte = ptd;
         break;
       }
-      else if(!(ptd & PTE_T))
-        break;
-
-      base = (ptd >> PTE_PPN_SHIFT) << PGSHIFT;
     }
   }