Remove a debugging printf

[riscv-isa-sim.git] / riscv / processor.cc

diff --git a/riscv/processor.cc b/riscv/processor.cc
index ef529fc20c1d6d885b2fc7b22abad7060302a68c..6f0d3a7b9008bef422a8769ec4b881e2edc81fb7 100644 (file)
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -210,7 +210,7 @@ void processor_t::take_trap(trap_t& t, reg_t epc)
     if (t.cause() == CAUSE_BREAKPOINT) {
       state.pc = debug_rom_entry();
     } else {
-      state.pc = DEBUG_ROM_EXCEPTION;
+      state.pc = DEBUG_ROM_TVEC;
     }
     return;
   }