truncate effective addresses in rv32

[riscv-isa-sim.git] / riscv / processor.cc

diff --git a/riscv/processor.cc b/riscv/processor.cc
index b90bdd684810ac371feb7ed05a25d19dbcc21911..9f87f75c0300779d52390d120a41e2285e3cff3f 100644 (file)
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -221,8 +221,7 @@ void processor_t::set_pcr(int which, reg_t val)
       sr &= ~SR_EV;
 #endif
       // update MMU state and flush TLB
-      mmu.set_vm_enabled(sr & SR_VM);
-      mmu.set_supervisor(sr & SR_S);
+      mmu.set_sr(sr);
       mmu.flush_tlb();
       // set the fixed-point register length
       xprlen = ((sr & SR_S) ? (sr & SR_S64) : (sr & SR_U64)) ? 64 : 32;