correct HTIF reset behavior

[riscv-isa-sim.git] / riscv / processor.h

diff --git a/riscv/processor.h b/riscv/processor.h
index a00487fc9ffe858e930a8def9e4a3a71880e8786..927f06c74c85aaeaa55105a6ac1dda0142992276 100644 (file)
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -20,7 +20,7 @@ public:
   processor_t(sim_t* _sim, mmu_t* _mmu, uint32_t _id);
   ~processor_t();
 
-  void reset();
+  void reset(bool value);
   void step(size_t n, bool noisy); // run for n cycles
   void deliver_ipi(); // register an interprocessor interrupt
   bool running() { return run; }
@@ -58,8 +58,7 @@ private:
   // # of bits in an XPR (32 or 64). (redundant with sr)
   int xprlen;
 
-  // is this processor running? (deliver_ipi() sets this)
-  bool run;
+  bool run; // !reset
 
   // functions
   void take_interrupt(); // take a trap if any interrupts are pending