[sim, opcodes] made sim more decoupled from opcodes

[riscv-isa-sim.git] / riscv / processor.h

diff --git a/riscv/processor.h b/riscv/processor.h
index 1f458d584ba707763bb1eb41ef56297d1974bc78..b72fa27dfc362b6cad008da2d2e954570764c852 100644 (file)
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -9,6 +9,10 @@
 
 #define MAX_UTS 2048
 
+#define DISPATCH_TABLE_SIZE 1024
+class processor_t;
+typedef reg_t (*insn_func_t)(processor_t*, insn_t, reg_t);
+
 class sim_t;
 
 class processor_t
@@ -18,6 +22,7 @@ public:
   ~processor_t();
   void init(uint32_t _id, icsim_t* defualt_icache, icsim_t* default_dcache);
   void step(size_t n, bool noisy);
+  void deliver_ipi();
 
 private:
   sim_t* sim;
@@ -41,6 +46,8 @@ private:
   uint32_t count;
   uint32_t compare;
 
+  bool run;
+
   // unprivileged control registers
   uint32_t fsr;
 
@@ -54,6 +61,8 @@ private:
   reg_t cycle;
 
   // functions
+  void reset();
+  void take_interrupt();
   void set_sr(uint32_t val);
   void set_fsr(uint32_t val);
   void take_trap(trap_t t, bool noisy);
@@ -82,6 +91,14 @@ private:
   icsim_t* dtlbsim;
 
   friend class sim_t;
+
+  static insn_func_t dispatch_table[DISPATCH_TABLE_SIZE];
+  reg_t dispatch(insn_t insn, reg_t pc);
+  static void initialize_dispatch_table();
+
+  #define DECLARE_INSN(name, m, o) reg_t insn_func_ ## name (insn_t, reg_t);
+  #include "opcodes.h"
+  #undef DECLARE_INSN
 };
 
 #endif