[sim,pk] added interrupt-pending field to cause reg

[riscv-isa-sim.git] / riscv / processor.h

diff --git a/riscv/processor.h b/riscv/processor.h
index b54803844f01a32a784b9712ee401f05e66aba5c..c1c65ce2f1338d076abb0aa1fa6e85c42c63cc03 100644 (file)
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -36,7 +36,6 @@ private:
   uint32_t sr;
   uint32_t count;
   uint32_t compare;
-  uint32_t interrupts_pending;
 
   // unprivileged control registers
   uint32_t fsr;