Factor out the dummy RoCC accelerator

[riscv-isa-sim.git] / riscv / riscv.mk.in

diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index f916bd1e6dc2a3252b323656a810ea85c79bf3fe..0d5869dae2a290c409c64c8d3490e33bae74fe7a 100644 (file)
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -19,7 +19,6 @@ riscv_hdrs = \
        memtracer.h \
        extension.h \
        rocc.h \
-       dummy-rocc.h \
        insn_template.h \
        mulhi.h \
 
@@ -49,7 +48,8 @@ riscv_gen_srcs = \
        $(addsuffix .cc, $(call get_insn_list,$(src_dir)/riscv/encoding.h))
 
 icache.h:
-       $(src_dir)/riscv/gen_icache 1024 > $@
+       $(src_dir)/riscv/gen_icache 1024 > $@.tmp
+       mv $@.tmp $@
 
 $(riscv_gen_srcs): %.cc: insns/%.h insn_template.cc
        sed 's/NAME/$(subst .cc,,$@)/' $(src_dir)/riscv/insn_template.cc | sed 's/OPCODE/$(call get_opcode,$(src_dir)/riscv/encoding.h,$(subst .cc,,$@))/' > $@