[sim] vlen calc reflects the hardware

[riscv-isa-sim.git] / riscv / sim.cc

diff --git a/riscv/sim.cc b/riscv/sim.cc
index ca10e0942ac31d9ae33cf117f6fb901df0367394..c503ccbb922bf150f4c9f01da00193acef31c9b4 100644 (file)
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -4,8 +4,9 @@
 #include <sys/mman.h>
 #include <map>
 #include <iostream>
+#include <climits>
 
-sim_t::sim_t(int _nprocs, size_t _memsz, appserver_link_t* _applink)
+sim_t::sim_t(int _nprocs, size_t _memsz, appserver_link_t* _applink, icsim_t* default_icache, icsim_t* default_dcache)
   : applink(_applink),
     memsz(_memsz),
     mem((char*)mmap64(NULL, memsz, PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0)),
@@ -14,7 +15,7 @@ sim_t::sim_t(int _nprocs, size_t _memsz, appserver_link_t* _applink)
   demand(mem != MAP_FAILED, "couldn't allocate target machine's memory");
 
   for(int i = 0; i < (int)procs.size(); i++)
-    procs[i].init(i);
+    procs[i].init(i, default_icache, default_dcache);
 
   applink->init(this);
 }
@@ -74,6 +75,7 @@ void sim_t::run(bool debug)
       funcs["fregs"] = &sim_t::interactive_fregs;
       funcs["fregd"] = &sim_t::interactive_fregd;
       funcs["mem"] = &sim_t::interactive_mem;
+      funcs["str"] = &sim_t::interactive_str;
       funcs["until"] = &sim_t::interactive_until;
       funcs["while"] = &sim_t::interactive_until;
       funcs["q"] = &sim_t::interactive_quit;
@@ -108,7 +110,7 @@ void sim_t::interactive_run_silent(const std::string& cmd, const std::vector<std
 void sim_t::interactive_run(const std::string& cmd, const std::vector<std::string>& args, bool noisy)
 {
   if(args.size())
-    step_all(atoi(args[0].c_str()),1,noisy);
+    step_all(atoll(args[0].c_str()),1,noisy);
   else
     while(1) step_all(1,1,noisy);
 }
@@ -140,7 +142,7 @@ void sim_t::interactive_run_proc(const std::string& cmd, const std::vector<std::
 
 void sim_t::interactive_quit(const std::string& cmd, const std::vector<std::string>& args)
 {
-  exit(0);
+  throw quit_sim();
 }
 
 reg_t sim_t::get_pc(const std::vector<std::string>& args)
@@ -162,10 +164,10 @@ reg_t sim_t::get_reg(const std::vector<std::string>& args)
 
   int p = atoi(args[0].c_str());
   int r = atoi(args[1].c_str());
-  if(p >= (int)procs.size() || r >= NGPR)
+  if(p >= (int)procs.size() || r >= NXPR)
     throw trap_illegal_instruction;
 
-  return procs[p].R[r];
+  return procs[p].XPR[r];
 }
 
 reg_t sim_t::get_freg(const std::vector<std::string>& args)
@@ -178,7 +180,7 @@ reg_t sim_t::get_freg(const std::vector<std::string>& args)
   if(p >= (int)procs.size() || r >= NFPR)
     throw trap_illegal_instruction;
 
-  return procs[p].FR[r];
+  return procs[p].FPR[r];
 }
 
 reg_t sim_t::get_tohost(const std::vector<std::string>& args)
@@ -225,6 +227,9 @@ reg_t sim_t::get_mem(const std::vector<std::string>& args)
     throw trap_illegal_instruction;
 
   reg_t addr = strtol(args[0].c_str(),NULL,16), val;
+  if(addr == LONG_MAX)
+    addr = strtoul(args[0].c_str(),NULL,16);
+
   mmu_t mmu(mem,memsz);
   switch(addr % 8)
   {
@@ -250,6 +255,22 @@ void sim_t::interactive_mem(const std::string& cmd, const std::vector<std::strin
   printf("0x%016llx\n",(unsigned long long)get_mem(args));
 }
 
+void sim_t::interactive_str(const std::string& cmd, const std::vector<std::string>& args)
+{
+  if(args.size() != 1)
+    throw trap_illegal_instruction;
+
+  reg_t addr = strtol(args[0].c_str(),NULL,16);
+
+  mmu_t mmu(mem,memsz);
+  char ch;
+
+  while((ch = mmu.load_uint8(addr++)))
+    putchar(ch);
+
+  putchar('\n');
+}
+
 void sim_t::interactive_until(const std::string& cmd, const std::vector<std::string>& args)
 {
   if(args.size() < 3)
@@ -257,6 +278,8 @@ void sim_t::interactive_until(const std::string& cmd, const std::vector<std::str
 
   std::string scmd = args[0];
   reg_t val = strtol(args[args.size()-1].c_str(),NULL,16);
+  if(val == LONG_MAX)
+    val = strtoul(args[args.size()-1].c_str(),NULL,16);
   
   std::vector<std::string> args2;
   args2 = std::vector<std::string>(args.begin()+1,args.end()-1);