Make -H halt the core right out of reset.

[riscv-isa-sim.git] / riscv / sim.cc

diff --git a/riscv/sim.cc b/riscv/sim.cc
index b09e7208433675f832919ce31030114a257dca5b..d17289d5afc676b4ed8c7a6a5406b05f0407495a 100644 (file)
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -42,18 +42,16 @@ sim_t::sim_t(const char* isa, size_t nprocs, size_t mem_mb, bool halted,
     fprintf(stderr, "warning: only got %lu bytes of target mem (wanted %lu)\n",
             (unsigned long)memsz, (unsigned long)memsz0);
 
+  bus.add_device(DEBUG_START, &debug_module);
+
   debug_mmu = new mmu_t(this, NULL);
 
   for (size_t i = 0; i < procs.size(); i++) {
-    procs[i] = new processor_t(isa, this, i);
-    if (halted)
-      procs[i]->enter_debug_mode(DCSR_CAUSE_HALT);
+    procs[i] = new processor_t(isa, this, i, halted);
   }
 
   rtc.reset(new rtc_t(procs));
   make_config_string();
-
-  bus.add_device(DEBUG_START, &debug_module);
 }
 
 sim_t::~sim_t()
@@ -149,11 +147,6 @@ bool sim_t::mmio_store(reg_t addr, size_t len, const uint8_t* bytes)
   return bus.store(addr, len, bytes);
 }
 
-char* sim_t::mmio_page(reg_t addr)
-{
-  return bus.page(addr);
-}
-
 void sim_t::make_config_string()
 {
   reg_t rtc_addr = EXT_IO_BASE;