Rip out RVC for now

[riscv-isa-sim.git] / rvc / insns / c_slliw.h

diff --git a/rvc/insns/c_slliw.h b/rvc/insns/c_slliw.h
new file mode 100644 (file)
index 0000000..9e428f5
--- /dev/null
+++ b/rvc/insns/c_slliw.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_xpr64;
+CRDS = sext32(CRDS << CIMM5U);