Rip out RVC for now

[riscv-isa-sim.git] / rvc / insns / c_srli32.h

diff --git a/rvc/insns/c_srli32.h b/rvc/insns/c_srli32.h
new file mode 100644 (file)
index 0000000..4f5b8ea
--- /dev/null
+++ b/rvc/insns/c_srli32.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_xpr64;
+CRDS = CRDS >> (32+CIMM5U);