[sim] added SoftFloat-3 source

[riscv-isa-sim.git] / softfloat / SoftFloat-3 / source / f32_to_f64.c

diff --git a/softfloat/SoftFloat-3/source/f32_to_f64.c b/softfloat/SoftFloat-3/source/f32_to_f64.c
new file mode 100755 (executable)
index 0000000..9f0ae5c
--- /dev/null
+++ b/softfloat/SoftFloat-3/source/f32_to_f64.c
@@ -0,0 +1,47 @@
+\r
+#include <stdbool.h>\r
+#include <stdint.h>\r
+#include "platform.h"\r
+#include "internals.h"\r
+#include "specialize.h"\r
+#include "softfloat.h"\r
+\r
+float64_t f32_to_f64( float32_t a )\r
+{\r
+    union ui32_f32 uA;\r
+    uint_fast32_t uiA;\r
+    bool sign;\r
+    int_fast16_t exp;\r
+    uint_fast32_t sig;\r
+    uint_fast64_t uiZ;\r
+    struct exp16_sig32 normExpSig;\r
+    union ui64_f64 uZ;\r
+\r
+    uA.f = a;\r
+    uiA = uA.ui;\r
+    sign = signF32UI( uiA );\r
+    exp = expF32UI( uiA );\r
+    sig = fracF32UI( uiA );\r
+    if ( exp == 0xFF ) {\r
+        uiZ =\r
+            sig ? softfloat_commonNaNToF64UI(\r
+                      softfloat_f32UIToCommonNaN( uiA ) )\r
+                : packToF64UI( sign, 0x7FF, 0 );\r
+        goto uiZ;\r
+    }\r
+    if ( ! exp ) {\r
+        if ( ! sig ) {\r
+            uiZ = packToF64UI( sign, 0, 0 );\r
+            goto uiZ;\r
+        }\r
+        normExpSig = softfloat_normSubnormalF32Sig( sig );\r
+        exp = normExpSig.exp - 1;\r
+        sig = normExpSig.sig;\r
+    }\r
+    uiZ = packToF64UI( sign, exp + 0x380, (uint_fast64_t) sig<<29 );\r
+ uiZ:\r
+    uZ.ui = uiZ;\r
+    return uZ.f;\r
+\r
+}\r
+\r