[sim] added SoftFloat-3 source

[riscv-isa-sim.git] / softfloat / SoftFloat-3 / source / f64_to_i64_r_minMag.c

diff --git a/softfloat/SoftFloat-3/source/f64_to_i64_r_minMag.c b/softfloat/SoftFloat-3/source/f64_to_i64_r_minMag.c
new file mode 100755 (executable)
index 0000000..525705b
--- /dev/null
+++ b/softfloat/SoftFloat-3/source/f64_to_i64_r_minMag.c
@@ -0,0 +1,52 @@
+\r
+#include <stdbool.h>\r
+#include <stdint.h>\r
+#include "platform.h"\r
+#include "internals.h"\r
+#include "softfloat.h"\r
+\r
+int_fast64_t f64_to_i64_r_minMag( float64_t a, bool exact )\r
+{\r
+    union ui64_f64 uA;\r
+    uint_fast64_t uiA;\r
+    bool sign;\r
+    int_fast16_t exp;\r
+    uint_fast64_t sig;\r
+    int_fast16_t shiftCount;\r
+    int_fast64_t absZ;\r
+\r
+    uA.f = a;\r
+    uiA = uA.ui;\r
+    sign = signF64UI( uiA );\r
+    exp = expF64UI( uiA );\r
+    sig = fracF64UI( uiA );\r
+    shiftCount = exp - 0x433;\r
+    if ( 0 <= shiftCount ) {\r
+        if ( 0x43E <= exp ) {\r
+            if ( uiA != packToF64UI( 1, 0x43E, 0 ) ) {\r
+                softfloat_raiseFlags( softfloat_flag_invalid );\r
+                if ( ! sign || ( ( exp == 0x7FF ) && sig ) ) {\r
+                    return INT64_C( 0x7FFFFFFFFFFFFFFF );\r
+                }\r
+            }\r
+            return - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r
+        }\r
+        sig |= UINT64_C( 0x0010000000000000 );\r
+        absZ = sig<<shiftCount;\r
+    } else {\r
+        if ( exp < 0x3FF ) {\r
+            if ( exact && ( exp | sig ) ) {\r
+                softfloat_exceptionFlags |= softfloat_flag_inexact;\r
+            }\r
+            return 0;\r
+        }\r
+        sig |= UINT64_C( 0x0010000000000000 );\r
+        absZ = sig>>( - shiftCount );\r
+        if ( exact && (uint64_t) ( sig<<( shiftCount & 63 ) ) ) {\r
+            softfloat_exceptionFlags |= softfloat_flag_inexact;\r
+        }\r
+    }\r
+    return sign ? - absZ : absZ;\r
+\r
+}\r
+\r