[sim] renamed to riscv-isa-run
[riscv-isa-sim.git] / softfloat / f32_to_i64.c
diff --git a/softfloat/f32_to_i64.c b/softfloat/f32_to_i64.c
deleted file mode 100755 (executable)
index c0b8981..0000000
+++ /dev/null
@@ -1,44 +0,0 @@
-\r
-#include <stdbool.h>\r
-#include <stdint.h>\r
-#include "platform.h"\r
-#include "primitives.h"\r
-#include "internals.h"\r
-#include "softfloat.h"\r
-\r
-int_fast64_t f32_to_i64( float32_t a, int_fast8_t roundingMode, bool exact )\r
-{\r
-    union ui32_f32 uA;\r
-    uint_fast32_t uiA;\r
-    bool sign;\r
-    int_fast16_t exp;\r
-    uint_fast32_t sig;\r
-    int_fast16_t shiftCount;\r
-    uint_fast64_t sig64, extra;\r
-    struct uint64_extra sig64Extra;\r
-\r
-    uA.f = a;\r
-    uiA = uA.ui;\r
-    sign = signF32UI( uiA );\r
-    exp = expF32UI( uiA );\r
-    sig = fracF32UI( uiA );\r
-    shiftCount = 0xBE - exp;\r
-    if ( shiftCount < 0 ) {\r
-        softfloat_raiseFlags( softfloat_flag_invalid );\r
-        if ( ! sign || ( ( exp == 0xFF ) && sig ) ) {\r
-            return INT64_C( 0x7FFFFFFFFFFFFFFF );\r
-        }\r
-        return - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r
-    }\r
-    if ( exp ) sig |= 0x00800000;\r
-    sig64 = (uint_fast64_t) sig<<40;\r
-    extra = 0;\r
-    if ( shiftCount ) {\r
-        sig64Extra = softfloat_shift64ExtraRightJam( sig64, 0, shiftCount );\r
-        sig64 = sig64Extra.v;\r
-        extra = sig64Extra.extra;\r
-    }\r
-    return softfloat_roundPackToI64( sign, sig64, extra, roundingMode, exact );\r
-\r
-}\r
-\r