[sim] renamed to riscv-isa-run

[riscv-isa-sim.git] / softfloat / f32_to_i64_r_minMag.c

diff --git a/softfloat/f32_to_i64_r_minMag.c b/softfloat/f32_to_i64_r_minMag.c
deleted file mode 100755 (executable)
index 33bff93..0000000
--- a/softfloat/f32_to_i64_r_minMag.c
+++ /dev/null
@@ -1,52 +0,0 @@
-\r
-#include <stdbool.h>\r
-#include <stdint.h>\r
-#include "platform.h"\r
-#include "internals.h"\r
-#include "softfloat.h"\r
-\r
-int_fast64_t f32_to_i64_r_minMag( float32_t a, bool exact )\r
-{\r
-    union ui32_f32 uA;\r
-    uint_fast32_t uiA;\r
-    int_fast16_t exp;\r
-    uint_fast32_t sig;\r
-    bool sign;\r
-    int_fast16_t shiftCount;\r
-    uint_fast64_t sig64;\r
-    int_fast64_t absZ;\r
-\r
-    uA.f = a;\r
-    uiA = uA.ui;\r
-    exp = expF32UI( uiA );\r
-    sig = fracF32UI( uiA );\r
-    if ( exp < 0x7F ) {\r
-        if ( exact && ( exp | sig ) ) {\r
-            softfloat_exceptionFlags |= softfloat_flag_inexact;\r
-        }\r
-        return 0;\r
-    }\r
-    sign = signF32UI( uiA );\r
-    shiftCount = 0xBE - exp;\r
-    if ( shiftCount <= 0 ) {\r
-        if ( uiA != packToF32UI( 1, 0xBE, 0 ) ) {\r
-            softfloat_raiseFlags( softfloat_flag_invalid );\r
-            if ( ! sign || ( ( exp == 0xFF ) && sig ) ) {\r
-                return INT64_C( 0x7FFFFFFFFFFFFFFF );\r
-            }\r
-        }\r
-        return - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r
-    }\r
-    sig |= 0x00800000;\r
-    sig64 = (uint_fast64_t) sig<<40;\r
-    absZ = sig64>>shiftCount;\r
-    shiftCount = 40 - shiftCount;\r
-    if (\r
-        exact && ( shiftCount < 0 ) && (uint32_t) ( sig<<( shiftCount & 31 ) )\r
-    ) {\r
-        softfloat_exceptionFlags |= softfloat_flag_inexact;\r
-    }\r
-    return sign ? - absZ : absZ;\r
-\r
-}\r
-\r