[sim] renamed to riscv-isa-run

[riscv-isa-sim.git] / softfloat / f64_to_i64.c

diff --git a/softfloat/f64_to_i64.c b/softfloat/f64_to_i64.c
deleted file mode 100755 (executable)
index 89663ee..0000000
--- a/softfloat/f64_to_i64.c
+++ /dev/null
@@ -1,46 +0,0 @@
-\r
-#include <stdbool.h>\r
-#include <stdint.h>\r
-#include "platform.h"\r
-#include "primitives.h"\r
-#include "internals.h"\r
-#include "softfloat.h"\r
-\r
-int_fast64_t f64_to_i64( float64_t a, int_fast8_t roundingMode, bool exact )\r
-{\r
-    union ui64_f64 uA;\r
-    uint_fast64_t uiA;\r
-    bool sign;\r
-    int_fast16_t exp;\r
-    uint_fast64_t sig;\r
-    int_fast16_t shiftCount;\r
-    struct uint64_extra sigExtra;\r
-\r
-    uA.f = a;\r
-    uiA = uA.ui;\r
-    sign = signF64UI( uiA );\r
-    exp = expF64UI( uiA );\r
-    sig = fracF64UI( uiA );\r
-    if ( exp ) sig |= UINT64_C( 0x0010000000000000 );\r
-    shiftCount = 0x433 - exp;\r
-    if ( shiftCount <= 0 ) {\r
-        if ( 0x43E < exp ) {\r
-            softfloat_raiseFlags( softfloat_flag_invalid );\r
-            return\r
-                ! sign\r
-                    || ( ( exp == 0x7FF )\r
-                             && ( sig != UINT64_C( 0x0010000000000000 ) ) )\r
-                    ? INT64_C( 0x7FFFFFFFFFFFFFFF )\r
-                    : - INT64_C( 0x7FFFFFFFFFFFFFFF ) - 1;\r
-        }\r
-        sigExtra.v = sig<<( - shiftCount );\r
-        sigExtra.extra = 0;\r
-    } else {\r
-        sigExtra = softfloat_shift64ExtraRightJam( sig, 0, shiftCount );\r
-    }\r
-    return\r
-        softfloat_roundPackToI64(\r
-            sign, sigExtra.v, sigExtra.extra, roundingMode, exact );\r
-\r
-}\r
-\r