-\r
-/*** UPDATE COMMENTS. ***/\r
-\r
-#include "softfloat_types.h"\r
-\r
-union ui32_f32 { uint32_t ui; float32_t f; };\r
-union ui64_f64 { uint64_t ui; float64_t f; };\r
-#ifdef LITTLEENDIAN\r
-union ui128_f128 { uint64_t ui0, ui64; float128_t f; };\r
-#else\r
-union ui128_f128 { uint64_t ui64, ui0; float128_t f; };\r
-#endif\r
-\r
-enum {\r
- softfloat_mulAdd_subC = 1,\r
- softfloat_mulAdd_subProd = 2\r
-};\r
-\r
-uint_fast32_t\r
- softfloat_roundPackToUI32( bool, uint_fast64_t, int_fast8_t, bool );\r
-uint_fast64_t\r
- softfloat_roundPackToUI64(\r
- bool, uint_fast64_t, uint_fast64_t, int_fast8_t, bool );\r
-/*----------------------------------------------------------------------------\r
-| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6\r
-| and 7, and returns the properly rounded 32-bit integer corresponding to the\r
-| input. If `zSign' is 1, the input is negated before being converted to an\r
-| integer. Bit 63 of `absZ' must be zero. Ordinarily, the fixed-point input\r
-| is simply rounded to an integer, with the inexact exception raised if the\r
-| input cannot be represented exactly as an integer. However, if the fixed-\r
-| point input is too large, the invalid exception is raised and the largest\r
-| positive or negative integer is returned.\r
-*----------------------------------------------------------------------------*/\r
-int_fast32_t\r
- softfloat_roundPackToI32( bool, uint_fast64_t, int_fast8_t, bool );\r
-/*----------------------------------------------------------------------------\r
-| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and\r
-| `absZ1', with binary point between bits 63 and 64 (between the input words),\r
-| and returns the properly rounded 64-bit integer corresponding to the input.\r
-| If `zSign' is 1, the input is negated before being converted to an integer.\r
-| Ordinarily, the fixed-point input is simply rounded to an integer, with\r
-| the inexact exception raised if the input cannot be represented exactly as\r
-| an integer. However, if the fixed-point input is too large, the invalid\r
-| exception is raised and the largest positive or negative integer is\r
-| returned.\r
-*----------------------------------------------------------------------------*/\r
-int_fast64_t\r
- softfloat_roundPackToI64(\r
- bool, uint_fast64_t, uint_fast64_t, int_fast8_t, bool );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the single-precision floating-point value `a' is a NaN;\r
-| otherwise, returns 0.\r
-*----------------------------------------------------------------------------*/\r
-#define isNaNF32UI( ui ) (0xFF000000<(uint32_t)((uint_fast32_t)(ui)<<1))\r
-/*----------------------------------------------------------------------------\r
-| Returns the sign bit of the single-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-#define signF32UI( a ) ((bool)((uint32_t)(a)>>31))\r
-/*----------------------------------------------------------------------------\r
-| Returns the exponent bits of the single-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-#define expF32UI( a ) ((int_fast16_t)((a)>>23)&0xFF)\r
-/*----------------------------------------------------------------------------\r
-| Returns the fraction bits of the single-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-#define fracF32UI( a ) ((a)&0x007FFFFF)\r
-/*----------------------------------------------------------------------------\r
-| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a\r
-| single-precision floating-point value, returning the result. After being\r
-| shifted into the proper positions, the three fields are simply added\r
-| together to form the result. This means that any integer portion of `zSig'\r
-| will be added into the exponent. Since a properly normalized significand\r
-| will have an integer portion equal to 1, the `zExp' input should be 1 less\r
-| than the desired result exponent whenever `zSig' is a complete, normalized\r
-| significand.\r
-*----------------------------------------------------------------------------*/\r
-#define packToF32UI( sign, exp, sig ) (((uint32_t)(sign)<<31)+((uint32_t)(exp)<<23)+(sig))\r
-\r
-/*----------------------------------------------------------------------------\r
-| Normalizes the subnormal single-precision floating-point value represented\r
-| by the denormalized significand `aSig'. The normalized exponent and\r
-| significand are stored at the locations pointed to by `zExpPtr' and\r
-| `zSigPtr', respectively.\r
-*----------------------------------------------------------------------------*/\r
-struct exp16_sig32 { int_fast16_t exp; uint_fast32_t sig; };\r
-struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
-| and significand `zSig', and returns the proper single-precision floating-\r
-| point value corresponding to the abstract input. Ordinarily, the abstract\r
-| value is simply rounded and packed into the single-precision format, with\r
-| the inexact exception raised if the abstract input cannot be represented\r
-| exactly. However, if the abstract value is too large, the overflow and\r
-| inexact exceptions are raised and an infinity or maximal finite value is\r
-| returned. If the abstract value is too small, the input value is rounded to\r
-| a subnormal number, and the underflow and inexact exceptions are raised if\r
-| the abstract input cannot be represented exactly as a subnormal single-\r
-| precision floating-point number.\r
-| The input significand `zSig' has its binary point between bits 30\r
-| and 29, which is 7 bits to the left of the usual location. This shifted\r
-| significand must be normalized or smaller. If `zSig' is not normalized,\r
-| `zExp' must be 0; in that case, the result returned is a subnormal number,\r
-| and it must not require rounding. In the usual case that `zSig' is\r
-| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.\r
-| The handling of underflow and overflow follows the IEC/IEEE Standard for\r
-| Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-float32_t softfloat_roundPackToF32( bool, int_fast16_t, uint_fast32_t );\r
-/*----------------------------------------------------------------------------\r
-| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
-| and significand `zSig', and returns the proper single-precision floating-\r
-| point value corresponding to the abstract input. This routine is just like\r
-| `roundAndPackFloat32' except that `zSig' does not have to be normalized.\r
-| Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''\r
-| floating-point exponent.\r
-*----------------------------------------------------------------------------*/\r
-float32_t softfloat_normRoundPackToF32( bool, int_fast16_t, uint_fast32_t );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of adding the absolute values of the single-precision\r
-| floating-point values `a' and `b'. If `zSign' is 1, the sum is negated\r
-| before being returned. `zSign' is ignored if the result is a NaN.\r
-| The addition is performed according to the IEC/IEEE Standard for Binary\r
-| Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-float32_t softfloat_addMagsF32( uint_fast32_t, uint_fast32_t, bool );\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of subtracting the absolute values of the single-\r
-| precision floating-point values `a' and `b'. If `zSign' is 1, the\r
-| difference is negated before being returned. `zSign' is ignored if the\r
-| result is a NaN. The subtraction is performed according to the IEC/IEEE\r
-| Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-float32_t softfloat_subMagsF32( uint_fast32_t, uint_fast32_t, bool );\r
-/*----------------------------------------------------------------------------\r
-*----------------------------------------------------------------------------*/\r
-float32_t\r
- softfloat_mulAddF32( int, uint_fast32_t, uint_fast32_t, uint_fast32_t );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the double-precision floating-point value `a' is a NaN;\r
-| otherwise, returns 0.\r
-*----------------------------------------------------------------------------*/\r
-#define isNaNF64UI( ui ) (UINT64_C(0xFFE0000000000000)<(uint64_t)((uint_fast64_t)(ui)<<1))\r
-/*----------------------------------------------------------------------------\r
-| Returns the sign bit of the double-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-#define signF64UI( a ) ((bool)((uint64_t)(a)>>63))\r
-/*----------------------------------------------------------------------------\r
-| Returns the exponent bits of the double-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-#define expF64UI( a ) ((int_fast16_t)((a)>>52)&0x7FF)\r
-/*----------------------------------------------------------------------------\r
-| Returns the fraction bits of the double-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-#define fracF64UI( a ) ((a)&UINT64_C(0x000FFFFFFFFFFFFF))\r
-/*----------------------------------------------------------------------------\r
-| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a\r
-| double-precision floating-point value, returning the result. After being\r
-| shifted into the proper positions, the three fields are simply added\r
-| together to form the result. This means that any integer portion of `zSig'\r
-| will be added into the exponent. Since a properly normalized significand\r
-| will have an integer portion equal to 1, the `zExp' input should be 1 less\r
-| than the desired result exponent whenever `zSig' is a complete, normalized\r
-| significand.\r
-*----------------------------------------------------------------------------*/\r
-#define packToF64UI( sign, exp, sig ) (((uint64_t)(sign)<<63)+((uint64_t)(exp)<<52)+(sig))\r
-\r
-/*----------------------------------------------------------------------------\r
-| Normalizes the subnormal double-precision floating-point value represented\r
-| by the denormalized significand `aSig'. The normalized exponent and\r
-| significand are stored at the locations pointed to by `zExpPtr' and\r
-| `zSigPtr', respectively.\r
-*----------------------------------------------------------------------------*/\r
-struct exp16_sig64 { int_fast16_t exp; uint_fast64_t sig; };\r
-struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
-| and significand `zSig', and returns the proper double-precision floating-\r
-| point value corresponding to the abstract input. Ordinarily, the abstract\r
-| value is simply rounded and packed into the double-precision format, with\r
-| the inexact exception raised if the abstract input cannot be represented\r
-| exactly. However, if the abstract value is too large, the overflow and\r
-| inexact exceptions are raised and an infinity or maximal finite value is\r
-| returned. If the abstract value is too small, the input value is rounded\r
-| to a subnormal number, and the underflow and inexact exceptions are raised\r
-| if the abstract input cannot be represented exactly as a subnormal double-\r
-| precision floating-point number.\r
-| The input significand `zSig' has its binary point between bits 62\r
-| and 61, which is 10 bits to the left of the usual location. This shifted\r
-| significand must be normalized or smaller. If `zSig' is not normalized,\r
-| `zExp' must be 0; in that case, the result returned is a subnormal number,\r
-| and it must not require rounding. In the usual case that `zSig' is\r
-| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.\r
-| The handling of underflow and overflow follows the IEC/IEEE Standard for\r
-| Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-float64_t softfloat_roundPackToF64( bool, int_fast16_t, uint_fast64_t );\r
-/*----------------------------------------------------------------------------\r
-| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
-| and significand `zSig', and returns the proper double-precision floating-\r
-| point value corresponding to the abstract input. This routine is just like\r
-| `roundAndPackFloat64' except that `zSig' does not have to be normalized.\r
-| Bit 63 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''\r
-| floating-point exponent.\r
-*----------------------------------------------------------------------------*/\r
-float64_t softfloat_normRoundPackToF64( bool, int_fast16_t, uint_fast64_t );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of adding the absolute values of the double-precision\r
-| floating-point values `a' and `b'. If `zSign' is 1, the sum is negated\r
-| before being returned. `zSign' is ignored if the result is a NaN.\r
-| The addition is performed according to the IEC/IEEE Standard for Binary\r
-| Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-float64_t softfloat_addMagsF64( uint_fast64_t, uint_fast64_t, bool );\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of subtracting the absolute values of the double-\r
-| precision floating-point values `a' and `b'. If `zSign' is 1, the\r
-| difference is negated before being returned. `zSign' is ignored if the\r
-| result is a NaN. The subtraction is performed according to the IEC/IEEE\r
-| Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-float64_t softfloat_subMagsF64( uint_fast64_t, uint_fast64_t, bool );\r
-/*----------------------------------------------------------------------------\r
-*----------------------------------------------------------------------------*/\r
-float64_t\r
- softfloat_mulAddF64( int, uint_fast64_t, uint_fast64_t, uint_fast64_t );\r
-\r
+
+/*============================================================================
+
+This C header file is part of the SoftFloat IEEE Floating-Point Arithmetic
+Package, Release 3a, by John R. Hauser.
+
+Copyright 2011, 2012, 2013, 2014 The Regents of the University of California.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+ 1. Redistributions of source code must retain the above copyright notice,
+ this list of conditions, and the following disclaimer.
+
+ 2. Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions, and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ 3. Neither the name of the University nor the names of its contributors may
+ be used to endorse or promote products derived from this software without
+ specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS "AS IS", AND ANY
+EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ARE
+DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE FOR ANY
+DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+=============================================================================*/
+
+#ifndef internals_h
+#define internals_h 1
+
+#include <stdbool.h>
+#include <stdint.h>
+#include "primitives.h"
+#include "softfloat_types.h"
+
+union ui32_f32 { uint32_t ui; float32_t f; };
+union ui64_f64 { uint64_t ui; float64_t f; };
+
+#ifdef SOFTFLOAT_FAST_INT64
+union extF80M_extF80 { struct extFloat80M fM; extFloat80_t f; };
+union ui128_f128 { struct uint128 ui; float128_t f; };
+#endif
+
+enum {
+ softfloat_mulAdd_subC = 1,
+ softfloat_mulAdd_subProd = 2
+};
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+uint_fast32_t
+ softfloat_roundPackToUI32( bool, uint_fast64_t, uint_fast8_t, bool );
+
+#ifdef SOFTFLOAT_FAST_INT64
+uint_fast64_t
+ softfloat_roundPackToUI64(
+ bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
+#else
+uint_fast64_t
+ softfloat_roundPackMToUI64( bool, uint32_t *, uint_fast8_t, bool );
+#endif
+
+int_fast32_t
+ softfloat_roundPackToI32( bool, uint_fast64_t, uint_fast8_t, bool );
+
+#ifdef SOFTFLOAT_FAST_INT64
+int_fast64_t
+ softfloat_roundPackToI64(
+ bool, uint_fast64_t, uint_fast64_t, uint_fast8_t, bool );
+#else
+int_fast64_t softfloat_roundPackMToI64( bool, uint32_t *, uint_fast8_t, bool );
+#endif
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF32UI( a ) ((bool) ((uint32_t) (a)>>31))
+#define expF32UI( a ) ((int_fast16_t) ((a)>>23) & 0xFF)
+#define fracF32UI( a ) ((a) & 0x007FFFFF)
+#define packToF32UI( sign, exp, sig ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<23) + (sig))
+
+#define isNaNF32UI( a ) ((((a) & 0x7F800000) == 0x7F800000) && ((a) & 0x007FFFFF))
+
+struct exp16_sig32 { int_fast16_t exp; uint_fast32_t sig; };
+struct exp16_sig32 softfloat_normSubnormalF32Sig( uint_fast32_t );
+
+float32_t softfloat_roundPackToF32( bool, int_fast16_t, uint_fast32_t );
+float32_t softfloat_normRoundPackToF32( bool, int_fast16_t, uint_fast32_t );
+
+float32_t softfloat_addMagsF32( uint_fast32_t, uint_fast32_t, bool );
+float32_t softfloat_subMagsF32( uint_fast32_t, uint_fast32_t, bool );
+float32_t
+ softfloat_mulAddF32(
+ uint_fast32_t, uint_fast32_t, uint_fast32_t, uint_fast8_t );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF64UI( a ) ((bool) ((uint64_t) (a)>>63))
+#define expF64UI( a ) ((int_fast16_t) ((a)>>52) & 0x7FF)
+#define fracF64UI( a ) ((a) & UINT64_C( 0x000FFFFFFFFFFFFF ))
+#define packToF64UI( sign, exp, sig ) ((uint64_t) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<52) + (sig)))
+
+#define isNaNF64UI( a ) ((((a) & UINT64_C( 0x7FF0000000000000 )) == UINT64_C( 0x7FF0000000000000 )) && ((a) & UINT64_C( 0x000FFFFFFFFFFFFF )))
+
+struct exp16_sig64 { int_fast16_t exp; uint_fast64_t sig; };
+struct exp16_sig64 softfloat_normSubnormalF64Sig( uint_fast64_t );
+
+float64_t softfloat_roundPackToF64( bool, int_fast16_t, uint_fast64_t );
+float64_t softfloat_normRoundPackToF64( bool, int_fast16_t, uint_fast64_t );
+
+float64_t softfloat_addMagsF64( uint_fast64_t, uint_fast64_t, bool );
+float64_t softfloat_subMagsF64( uint_fast64_t, uint_fast64_t, bool );
+float64_t
+ softfloat_mulAddF64(
+ uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signExtF80UI64( a64 ) ((bool) ((uint16_t) (a64)>>15))
+#define expExtF80UI64( a64 ) ((a64) & 0x7FFF)
+#define packToExtF80UI64( sign, exp ) ((uint_fast16_t) (sign)<<15 | (exp))
+
+#define isNaNExtF80UI( a64, a0 ) ((((a64) & 0x7FFF) == 0x7FFF) && ((a0) & UINT64_C( 0x7FFFFFFFFFFFFFFF )))
+
+#ifdef SOFTFLOAT_FAST_INT64
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+
+struct exp32_sig64 { int_fast32_t exp; uint64_t sig; };
+struct exp32_sig64 softfloat_normSubnormalExtF80Sig( uint_fast64_t );
+
+extFloat80_t
+ softfloat_roundPackToExtF80(
+ bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
+extFloat80_t
+ softfloat_normRoundPackToExtF80(
+ bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast8_t );
+
+extFloat80_t
+ softfloat_addMagsExtF80(
+ uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+extFloat80_t
+ softfloat_subMagsExtF80(
+ uint_fast16_t, uint_fast64_t, uint_fast16_t, uint_fast64_t, bool );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF128UI64( a64 ) ((bool) ((uint64_t) (a64)>>63))
+#define expF128UI64( a64 ) ((int_fast32_t) ((a64)>>48) & 0x7FFF)
+#define fracF128UI64( a64 ) ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))
+#define packToF128UI64( sign, exp, sig64 ) (((uint_fast64_t) (sign)<<63) + ((uint_fast64_t) (exp)<<48) + (sig64))
+
+#define isNaNF128UI( a64, a0 ) ((((a64) & UINT64_C( 0x7FFF000000000000 )) == UINT64_C( 0x7FFF000000000000 )) && (a0 || ((a64) & UINT64_C( 0x0000FFFFFFFFFFFF ))))
+
+struct exp32_sig128 { int_fast32_t exp; struct uint128 sig; };
+struct exp32_sig128
+ softfloat_normSubnormalF128Sig( uint_fast64_t, uint_fast64_t );
+
+float128_t
+ softfloat_roundPackToF128(
+ bool, int_fast32_t, uint_fast64_t, uint_fast64_t, uint_fast64_t );
+float128_t
+ softfloat_normRoundPackToF128(
+ bool, int_fast32_t, uint_fast64_t, uint_fast64_t );
+
+float128_t
+ softfloat_addMagsF128(
+ uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );
+float128_t
+ softfloat_subMagsF128(
+ uint_fast64_t, uint_fast64_t, uint_fast64_t, uint_fast64_t, bool );
+float128_t
+ softfloat_mulAddF128(
+ uint_fast64_t,
+ uint_fast64_t,
+ uint_fast64_t,
+ uint_fast64_t,
+ uint_fast64_t,
+ uint_fast64_t,
+ uint_fast8_t
+ );
+
+#else
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+
+bool
+ softfloat_tryPropagateNaNExtF80M(
+ const struct extFloat80M *,
+ const struct extFloat80M *,
+ struct extFloat80M *
+ );
+void softfloat_invalidExtF80M( struct extFloat80M * );
+
+int softfloat_normExtF80SigM( uint64_t * );
+
+void
+ softfloat_roundPackMToExtF80M(
+ bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * );
+void
+ softfloat_normRoundPackMToExtF80M(
+ bool, int32_t, uint32_t *, uint_fast8_t, struct extFloat80M * );
+
+void
+ softfloat_addExtF80M(
+ const struct extFloat80M *,
+ const struct extFloat80M *,
+ struct extFloat80M *,
+ bool
+ );
+
+int
+ softfloat_compareNonnormExtF80M(
+ const struct extFloat80M *, const struct extFloat80M * );
+
+/*----------------------------------------------------------------------------
+*----------------------------------------------------------------------------*/
+#define signF128UI96( a96 ) ((bool) ((uint32_t) (a96)>>31))
+#define expF128UI96( a96 ) ((int32_t) ((a96)>>16) & 0x7FFF)
+#define fracF128UI96( a96 ) ((a96) & 0x0000FFFF)
+#define packToF128UI96( sign, exp, sig96 ) (((uint32_t) (sign)<<31) + ((uint32_t) (exp)<<16) + (sig96))
+
+bool softfloat_isNaNF128M( const uint32_t * );
+
+bool
+ softfloat_tryPropagateNaNF128M(
+ const uint32_t *, const uint32_t *, uint32_t * );
+void softfloat_invalidF128M( uint32_t * );
+
+int softfloat_shiftNormSigF128M( const uint32_t *, uint_fast8_t, uint32_t * );
+
+void softfloat_roundPackMToF128M( bool, int32_t, uint32_t *, uint32_t * );
+void softfloat_normRoundPackMToF128M( bool, int32_t, uint32_t *, uint32_t * );
+
+void
+ softfloat_addF128M( const uint32_t *, const uint32_t *, uint32_t *, bool );
+void
+ softfloat_mulAddF128M(
+ const uint32_t *,
+ const uint32_t *,
+ const uint32_t *,
+ uint32_t *,
+ uint_fast8_t
+ );
+
+#endif
+
+#endif
+
projects / riscv-isa-sim.git / blobdiff