[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / softfloat / s_mulAddF32.cc

diff --git a/softfloat/s_mulAddF32.cc b/softfloat/s_mulAddF32.cc
new file mode 100755 (executable)
index 0000000..e55a0ba
--- /dev/null
+++ b/softfloat/s_mulAddF32.cc
@@ -0,0 +1,171 @@
+\r
+#include <stdbool.h>\r
+#include <stdint.h>\r
+#include "platform.h"\r
+#include "primitives.h"\r
+#include "internals.h"\r
+#include "specialize.h"\r
+#include "softfloat.h"\r
+\r
+float32_t\r
+ softfloat_mulAddF32(\r
+     int op, uint_fast32_t uiA, uint_fast32_t uiB, uint_fast32_t uiC )\r
+{\r
+    bool signA;\r
+    int_fast16_t expA;\r
+    uint_fast32_t sigA;\r
+    bool signB;\r
+    int_fast16_t expB;\r
+    uint_fast32_t sigB;\r
+    bool signC;\r
+    int_fast16_t expC;\r
+    uint_fast32_t sigC;\r
+    bool signProd;\r
+    uint_fast32_t magBits, uiZ;\r
+    struct exp16_sig32 normExpSig;\r
+    int_fast16_t expProd;\r
+    uint_fast64_t sigProd;\r
+    bool signZ;\r
+    int_fast16_t expZ;\r
+    uint_fast32_t sigZ;\r
+    int_fast16_t expDiff;\r
+    uint_fast64_t sigZ64, sigC64;\r
+    int shiftCount;\r
+    union ui32_f32 uZ;\r
+\r
+    signA = signF32UI( uiA );\r
+    expA = expF32UI( uiA );\r
+    sigA = fracF32UI( uiA );\r
+    signB = signF32UI( uiB );\r
+    expB = expF32UI( uiB );\r
+    sigB = fracF32UI( uiB );\r
+    signC = signF32UI( uiC ) ^ ( op == softfloat_mulAdd_subC );\r
+    expC = expF32UI( uiC );\r
+    sigC = fracF32UI( uiC );\r
+    signProd = signA ^ signB ^ ( op == softfloat_mulAdd_subProd );\r
+    if ( expA == 0xFF ) {\r
+        if ( sigA || ( ( expB == 0xFF ) && sigB ) ) goto propagateNaN_ABC;\r
+        magBits = expB | sigB;\r
+        goto infProdArg;\r
+    }\r
+    if ( expB == 0xFF ) {\r
+        if ( sigB ) goto propagateNaN_ABC;\r
+        magBits = expA | sigA;\r
+        goto infProdArg;\r
+    }\r
+    if ( expC == 0xFF ) {\r
+        if ( sigC ) {\r
+            uiZ = 0;\r
+            goto propagateNaN_ZC;\r
+        }\r
+        uiZ = uiC;\r
+        goto uiZ;\r
+    }\r
+    if ( ! expA ) {\r
+        if ( ! sigA ) goto zeroProd;\r
+        normExpSig = softfloat_normSubnormalF32Sig( sigA );\r
+        expA = normExpSig.exp;\r
+        sigA = normExpSig.sig;\r
+    }\r
+    if ( ! expB ) {\r
+        if ( ! sigB ) goto zeroProd;\r
+        normExpSig = softfloat_normSubnormalF32Sig( sigB );\r
+        expB = normExpSig.exp;\r
+        sigB = normExpSig.sig;\r
+    }\r
+    expProd = expA + expB - 0x7E;\r
+    sigA = ( sigA | 0x00800000 )<<7;\r
+    sigB = ( sigB | 0x00800000 )<<7;\r
+    sigProd = (uint_fast64_t) sigA * sigB;\r
+    if ( sigProd < UINT64_C( 0x2000000000000000 ) ) {\r
+        --expProd;\r
+        sigProd <<= 1;\r
+    }\r
+    signZ = signProd;\r
+    if ( ! expC ) {\r
+        if ( ! sigC ) {\r
+            expZ = expProd - 1;\r
+            sigZ = softfloat_shortShift64RightJam( sigProd, 31 );\r
+            goto roundPack;\r
+        }\r
+        normExpSig = softfloat_normSubnormalF32Sig( sigC );\r
+        expC = normExpSig.exp;\r
+        sigC = normExpSig.sig;\r
+    }\r
+    sigC = ( sigC | 0x00800000 )<<6;\r
+    expDiff = expProd - expC;\r
+    if ( signProd == signC ) {\r
+        if ( expDiff <= 0 ) {\r
+            expZ = expC;\r
+            sigZ = sigC + softfloat_shift64RightJam( sigProd, 32 - expDiff );\r
+        } else {\r
+            expZ = expProd;\r
+            sigZ64 =\r
+                sigProd\r
+                    + softfloat_shift64RightJam(\r
+                          (uint_fast64_t) sigC<<32, expDiff );\r
+            sigZ = softfloat_shortShift64RightJam( sigZ64, 32 );\r
+        }\r
+        if ( sigZ < 0x40000000 ) {\r
+            --expZ;\r
+            sigZ <<= 1;\r
+        }\r
+    } else {\r
+/*** OPTIMIZE BETTER? ***/\r
+        sigC64 = (uint_fast64_t) sigC<<32;\r
+        if ( expDiff < 0 ) {\r
+            signZ = signC;\r
+            expZ = expC;\r
+            sigZ64 = sigC64 - softfloat_shift64RightJam( sigProd, - expDiff );\r
+        } else if ( ! expDiff ) {\r
+            expZ = expProd;\r
+            sigZ64 = sigProd - sigC64;\r
+            if ( ! sigZ64 ) goto completeCancellation;\r
+            if ( sigZ64 & UINT64_C( 0x8000000000000000 ) ) {\r
+                signZ ^= 1;\r
+                sigZ64 = - sigZ64;\r
+            }\r
+        } else {\r
+            expZ = expProd;\r
+            sigZ64 = sigProd - softfloat_shift64RightJam( sigC64, expDiff );\r
+        }\r
+        shiftCount = softfloat_countLeadingZeros64( sigZ64 ) - 1;\r
+        expZ -= shiftCount;\r
+        shiftCount -= 32;\r
+        if ( shiftCount < 0 ) {\r
+            sigZ = softfloat_shortShift64RightJam( sigZ64, - shiftCount );\r
+        } else {\r
+            sigZ = (uint_fast32_t) sigZ64<<shiftCount;\r
+        }\r
+    }\r
+ roundPack:\r
+    return softfloat_roundPackToF32( signZ, expZ, sigZ );\r
+ propagateNaN_ABC:\r
+    uiZ = softfloat_propagateNaNF32UI( uiA, uiB );\r
+    goto propagateNaN_ZC;\r
+ infProdArg:\r
+    if ( magBits ) {\r
+        uiZ = packToF32UI( signProd, 0xFF, 0 );\r
+        if ( expC != 0xFF ) goto uiZ;\r
+        if ( sigC ) goto propagateNaN_ZC;\r
+        if ( signProd == signC ) goto uiZ;\r
+    }\r
+ invalid:\r
+    softfloat_raiseFlags( softfloat_flag_invalid );\r
+    uiZ = defaultNaNF32UI;\r
+ propagateNaN_ZC:\r
+    uiZ = softfloat_propagateNaNF32UI( uiZ, uiC );\r
+    goto uiZ;\r
+ zeroProd:\r
+    uiZ = uiC;\r
+    if ( ! ( expC | sigC ) && ( signProd != signC ) ) {\r
+ completeCancellation:\r
+        uiZ =\r
+            packToF32UI( softfloat_roundingMode == softfloat_round_min, 0, 0 );\r
+    }\r
+ uiZ:\r
+    uZ.ui = uiZ;\r
+    return uZ.f;\r
+\r
+}\r
+\r