Add fclass.{s|d} instructions

[riscv-isa-sim.git] / softfloat / softfloat.h

diff --git a/softfloat/softfloat.h b/softfloat/softfloat.h
index 3eddeed0343b13dc56d24a1dcc7456a2150ba28e..bacaf1e11346c335cdc776596a403d3abaa4222c 100755 (executable)
--- a/softfloat/softfloat.h
+++ b/softfloat/softfloat.h
@@ -128,6 +128,7 @@ bool f32_eq_signaling( float32_t, float32_t );
 bool f32_le_quiet( float32_t, float32_t );\r
 bool f32_lt_quiet( float32_t, float32_t );\r
 bool f32_isSignalingNaN( float32_t );\r
+uint_fast16_t f32_classify( float32_t );\r
 \r
 /*----------------------------------------------------------------------------\r
 | 64-bit (double-precision) floating-point operations.\r
@@ -158,6 +159,7 @@ bool f64_eq_signaling( float64_t, float64_t );
 bool f64_le_quiet( float64_t, float64_t );\r
 bool f64_lt_quiet( float64_t, float64_t );\r
 bool f64_isSignalingNaN( float64_t );\r
+uint_fast16_t f64_classify( float64_t );\r
 \r
 /*----------------------------------------------------------------------------\r
 | Extended double-precision rounding precision.  Valid values are 32, 64, and\r