Major changes to how SimObjects are created and initialized. Almost all

[gem5.git] / src / cpu / exetrace.cc

diff --git a/src/cpu/exetrace.cc b/src/cpu/exetrace.cc
index 85df19348b4c7c51573a76177776fbf4b0d57478..25d41811e26d7f104aed54bb9c9cd5b3eb0a8543 100644 (file)
--- a/src/cpu/exetrace.cc
+++ b/src/cpu/exetrace.cc
@@ -46,7 +46,7 @@
 #include "cpu/base.hh"
 #include "cpu/exetrace.hh"
 #include "cpu/static_inst.hh"
-#include "sim/param.hh"
+#include "enums/OpClass.hh"
 #include "sim/system.hh"
 
 #if FULL_SYSTEM
@@ -355,7 +355,7 @@ Trace::InstRecord::dump()
         outs << " : ";
 
         if (IsOn(ExecOpClass)) {
-            outs << opClassStrings[staticInst->opClass()] << " : ";
+            outs << Enums::OpClassStrings[staticInst->opClass()] << " : ";
         }
 
         if (IsOn(ExecResult) && data_status != DataInvalid) {