Major changes to how SimObjects are created and initialized. Almost all
[gem5.git] / src / dev / isa_fake.cc
index 23761cd1080c3ecddeb85dc6c485e6e67dfc00a7..8e11e607bf6e2e9385df31d46a93330392cc4dab 100644 (file)
  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  *
- * Authors: Miguel Serrano
- *          Ali Saidi
+ * Authors: Ali Saidi
  */
 
 /** @file
  * Isa Fake Device implementation
  */
 
-#include <deque>
-#include <string>
-#include <vector>
-
 #include "base/trace.hh"
 #include "dev/isa_fake.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
-#include "sim/builder.hh"
 #include "sim/system.hh"
 
 using namespace std;
@@ -49,75 +43,109 @@ using namespace std;
 IsaFake::IsaFake(Params *p)
     : BasicPioDevice(p)
 {
-    pioSize = p->pio_size;
+    if (!p->ret_bad_addr)
+        pioSize = p->pio_size;
+
+    retData8 = p->ret_data8;
+    retData16 = p->ret_data16;
+    retData32 = p->ret_data32;
+    retData64 = p->ret_data64;
 }
 
 Tick
 IsaFake::read(PacketPtr pkt)
 {
     assert(pkt->result == Packet::Unknown);
-    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
-
-    DPRINTF(Tsunami, "read  va=%#x size=%d\n", pkt->getAddr(), pkt->getSize());
 
-    switch (pkt->getSize()) {
-      case sizeof(uint64_t):
-         pkt->set(0xFFFFFFFFFFFFFFFFULL);
-         break;
-      case sizeof(uint32_t):
-         pkt->set((uint32_t)0xFFFFFFFF);
-         break;
-      case sizeof(uint16_t):
-         pkt->set((uint16_t)0xFFFF);
-         break;
-      case sizeof(uint8_t):
-         pkt->set((uint8_t)0xFF);
-         break;
-      default:
-        panic("invalid access size(?) for PCI configspace!\n");
+    if (params()->warn_access != "")
+        warn("Device %s accessed by read to address %#x size=%d\n",
+                name(), pkt->getAddr(), pkt->getSize());
+    if (params()->ret_bad_addr) {
+        DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n",
+                pkt->getAddr(), pkt->getSize());
+        pkt->result = Packet::BadAddress;
+    } else {
+        assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
+        DPRINTF(Tsunami, "read  va=%#x size=%d\n",
+                pkt->getAddr(), pkt->getSize());
+        switch (pkt->getSize()) {
+          case sizeof(uint64_t):
+             pkt->set(retData64);
+             break;
+          case sizeof(uint32_t):
+             pkt->set(retData32);
+             break;
+          case sizeof(uint16_t):
+             pkt->set(retData16);
+             break;
+          case sizeof(uint8_t):
+             pkt->set(retData8);
+             break;
+          default:
+            panic("invalid access size!\n");
+        }
+        pkt->result = Packet::Success;
     }
-    pkt->result = Packet::Success;
     return pioDelay;
 }
 
 Tick
 IsaFake::write(PacketPtr pkt)
 {
-    DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt->getAddr(), pkt->getSize());
-    pkt->result = Packet::Success;
+    if (params()->warn_access != "") {
+        uint64_t data;
+        switch (pkt->getSize()) {
+          case sizeof(uint64_t):
+            data = pkt->get<uint64_t>();
+            break;
+          case sizeof(uint32_t):
+            data = pkt->get<uint32_t>();
+            break;
+          case sizeof(uint16_t):
+            data = pkt->get<uint16_t>();
+            break;
+          case sizeof(uint8_t):
+            data = pkt->get<uint8_t>();
+            break;
+          default:
+            panic("invalid access size!\n");
+        }
+        warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
+                name(), pkt->getAddr(), pkt->getSize(), data);
+    }
+    if (params()->ret_bad_addr) {
+        DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n",
+                pkt->getAddr(), pkt->getSize());
+        pkt->result = Packet::BadAddress;
+    } else {
+        DPRINTF(Tsunami, "write - va=%#x size=%d \n",
+                pkt->getAddr(), pkt->getSize());
+
+        if (params()->update_data) {
+            switch (pkt->getSize()) {
+              case sizeof(uint64_t):
+                retData64 = pkt->get<uint64_t>();
+                break;
+              case sizeof(uint32_t):
+                retData32 = pkt->get<uint32_t>();
+                break;
+              case sizeof(uint16_t):
+                retData16 = pkt->get<uint16_t>();
+                break;
+              case sizeof(uint8_t):
+                retData8 = pkt->get<uint8_t>();
+                break;
+              default:
+                panic("invalid access size!\n");
+            }
+        }
+        pkt->result = Packet::Success;
+    }
     return pioDelay;
 }
 
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
-
-    Param<Addr> pio_addr;
-    Param<Tick> pio_latency;
-    Param<Addr> pio_size;
-    SimObjectParam<Platform *> platform;
-    SimObjectParam<System *> system;
-
-END_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
-
-BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake)
-
-    INIT_PARAM(pio_addr, "Device Address"),
-    INIT_PARAM(pio_latency, "Programmed IO latency"),
-    INIT_PARAM(pio_size, "Size of address range"),
-    INIT_PARAM(platform, "platform"),
-    INIT_PARAM(system, "system object")
-
-END_INIT_SIM_OBJECT_PARAMS(IsaFake)
-
-CREATE_SIM_OBJECT(IsaFake)
+IsaFake *
+IsaFakeParams::create()
 {
-    IsaFake::Params *p = new IsaFake::Params;
-    p->name = getInstanceName();
-    p->pio_addr = pio_addr;
-    p->pio_delay = pio_latency;
-    p->pio_size = pio_size;
-    p->platform = platform;
-    p->system = system;
-    return new IsaFake(p);
+    return new IsaFake(this);
 }
-
-REGISTER_SIM_OBJECT("IsaFake", IsaFake)