freedreno/a6xx: Document the bit for the magic 32bit-uniforms-as-16b mode.

[mesa.git] / src / freedreno / .gitlab-ci / reference / dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log

diff --git a/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log b/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
index 1115b3040d3f616f3b078890b21c9c7100ca5577..2471e5b9352e63fcdeadfd2229cdd0ab0f0a0a01 100644 (file)
--- a/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
+++ b/src/freedreno/.gitlab-ci/reference/dEQP-VK.draw.indirect_draw.indexed.indirect_draw_count.triangle_list.log
@@ -75,8 +75,8 @@ t4            write SP_UNKNOWN_A982 (a982)
 t4             write SP_UNKNOWN_A9A8 (a9a8)
                        SP_UNKNOWN_A9A8: 0
 00000000010580b4:              0000: 40a9a801 00000000
-t4             write SP_UNKNOWN_AB00 (ab00)
-                       SP_UNKNOWN_AB00: 0x5
+t4             write SP_MODE_CONTROL (ab00)
+                       SP_MODE_CONTROL: { CONSTANT_DEMOTION_ENABLE | 0x4 }
 00000000010580bc:              0000: 40ab0001 00000005
 t4             write VFD_ADD_OFFSET (a009)
                        VFD_ADD_OFFSET: { VERTEX }
@@ -345,7 +345,7 @@ t7          opcode: CP_BLIT (2c) (2 dwords)
  +     00000000                SP_GS_CTRL_REG0: { HALFREGFOOTPRINT = 0 | FULLREGFOOTPRINT = 0 | BRANCHSTACK = 0 | THREADSIZE = TWO_QUADS }
  +     00000000                SP_UNKNOWN_A982: 0
  +     00000000                SP_UNKNOWN_A9A8: 0
-!+     00000005                SP_UNKNOWN_AB00: 0x5
+!+     00000005                SP_MODE_CONTROL: { CONSTANT_DEMOTION_ENABLE | 0x4 }
  +     00000000                SP_IBO_COUNT: 0
 !+     0000f180                SP_2D_DST_FORMAT: { COLOR_FORMAT = FMT6_8_8_8_8_UNORM | MASK = 0xf }
  +     00000000                SP_UNKNOWN_AE00: 0