ir3: Plumb through bindless support

[mesa.git] / src / freedreno / ir3 / ir3_legalize.c

diff --git a/src/freedreno/ir3/ir3_legalize.c b/src/freedreno/ir3/ir3_legalize.c
index 458629021a4caf0ab810ace270b8bdb90a6794b0..bed8cd1c03a8df9c88bd31ea73f8f9200f08ef84 100644 (file)
--- a/src/freedreno/ir3/ir3_legalize.c
+++ b/src/freedreno/ir3/ir3_legalize.c
@@ -215,13 +215,14 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
                        ctx->type == MESA_SHADER_VERTEX && n->opc == OPC_SAMGQ) {
                        struct ir3_instruction *samgp;
 
+                       list_delinit(&n->node);
+
                        for (i = 0; i < 4; i++) {
                                samgp = ir3_instr_clone(n);
                                samgp->opc = OPC_SAMGP0 + i;
                                if (i > 1)
                                        samgp->flags |= IR3_INSTR_SY;
                        }
-                       list_delinit(&n->node);
                } else {
                        list_addtail(&n->node, &block->instr_list);
                }
@@ -236,9 +237,8 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
                if (is_sfu(n))
                        regmask_set(&state->needs_ss, n->regs[0]);
 
-               if (is_tex(n) || (n->opc == OPC_META_TEX_PREFETCH)) {
+               if (is_tex_or_prefetch(n)) {
                        regmask_set(&state->needs_sy, n->regs[0]);
-                       ctx->so->need_pixlod = true;
                        if (n->opc == OPC_META_TEX_PREFETCH)
                                has_tex_prefetch = true;
                } else if (n->opc == OPC_RESINFO) {
@@ -273,7 +273,7 @@ legalize_block(struct ir3_legalize_ctx *ctx, struct ir3_block *block)
                 * their src register(s):
                 */
                if (is_tex(n) || is_sfu(n) || is_mem(n)) {
-                       foreach_src(reg, n) {
+                       foreach_src (reg, n) {
                                if (reg_gpr(reg))
                                        regmask_set(&state->needs_ss_war, reg);
                        }