ir3: Plumb through bindless support

[mesa.git] / src / freedreno / ir3 / ir3_shader.c

diff --git a/src/freedreno/ir3/ir3_shader.c b/src/freedreno/ir3/ir3_shader.c
index ff5bdf4b3d68932b9e881e8406f4f6391d7b3381..cb0de2e8d65192f858e0a396df786861e247decb 100644 (file)
--- a/src/freedreno/ir3/ir3_shader.c
+++ b/src/freedreno/ir3/ir3_shader.c
@@ -96,6 +96,9 @@ fixup_regfootprint(struct ir3_shader_variant *v, uint32_t gpu_id)
        }
 
        for (i = 0; i < v->outputs_count; i++) {
+               /* for ex, VS shaders with tess don't have normal varying outs: */
+               if (!VALIDREG(v->outputs[i].regid))
+                       continue;
                int32_t regid = v->outputs[i].regid + 3;
                if (v->outputs[i].half) {
                        if (gpu_id < 500) {
@@ -287,7 +290,7 @@ ir3_shader_destroy(struct ir3_shader *shader)
 static bool
 lower_output_var(nir_shader *nir, int location)
 {
-       nir_foreach_variable(var, &nir->outputs) {
+       nir_foreach_variable (var, &nir->outputs) {
                if (var->data.driver_location == location &&
                                ((var->data.precision == GLSL_PRECISION_MEDIUM) ||
                                        (var->data.precision == GLSL_PRECISION_LOW))) {
@@ -313,8 +316,8 @@ lower_mediump_outputs(nir_shader *nir)
        nir_builder b;
        nir_builder_init(&b, impl);
 
-       nir_foreach_block_safe(block, impl) {
-               nir_foreach_instr_safe(instr, block) {
+       nir_foreach_block_safe (block, impl) {
+               nir_foreach_instr_safe (instr, block) {
                        if (instr->type != nir_instr_type_intrinsic)
                                continue;
 
@@ -434,7 +437,7 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
        unsigned i;
 
        struct ir3_instruction *instr;
-       foreach_input_n(instr, i, ir) {
+       foreach_input_n (instr, i, ir) {
                reg = instr->regs[0];
                regid = reg->num;
                fprintf(out, "@in(%sr%d.%c)\tin%d",
@@ -456,7 +459,7 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
                                fetch->wrmask, fetch->cmd);
        }
 
-       foreach_output_n(instr, i, ir) {
+       foreach_output_n (instr, i, ir) {
                reg = instr->regs[0];
                regid = reg->num;
                fprintf(out, "@out(%sr%d.%c)\tout%d",
@@ -503,17 +506,27 @@ ir3_shader_disasm(struct ir3_shader_variant *so, uint32_t *bin, FILE *out)
        fprintf(out, "\n");
 
        /* print generic shader info: */
-       fprintf(out, "; %s prog %d/%d: %u instructions, %d half, %d full\n",
+       fprintf(out, "; %s prog %d/%d: %u instr, %u nops, %u non-nops, %u dwords\n",
                        type, so->shader->id, so->id,
                        so->info.instrs_count,
-                       so->info.max_half_reg + 1,
-                       so->info.max_reg + 1);
-
-       fprintf(out, "; %u constlen\n", so->constlen);
+                       so->info.nops_count,
+                       so->info.instrs_count - so->info.nops_count,
+                       so->info.sizedwords);
 
-       fprintf(out, "; %u (ss), %u (sy)\n", so->info.ss, so->info.sy);
+       fprintf(out, "; %s prog %d/%d: %u last-baryf, %d half, %d full, %u constlen\n",
+                       type, so->shader->id, so->id,
+                       so->info.last_baryf,
+                       so->info.max_half_reg + 1,
+                       so->info.max_reg + 1,
+                       so->constlen);
 
-       fprintf(out, "; max_sun=%u\n", ir->max_sun);
+       fprintf(out, "; %s prog %d/%d: %u sstall, %u (ss), %u (sy), %d max_sun, %d loops\n",
+                       type, so->shader->id, so->id,
+                       so->info.sstall,
+                       so->info.ss,
+                       so->info.sy,
+                       so->max_sun,
+                       so->loops);
 
        /* print shader type specific info: */
        switch (so->type) {