freedreno/a6xx: VSC overflow detection/handling

[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_screen.c

diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_screen.c b/src/gallium/drivers/freedreno/a6xx/fd6_screen.c
index a191ea696ba1035016444a2067d46a0a5a99fefd..744737b5412940e652816580a81b846a2353f14a 100644 (file)
--- a/src/gallium/drivers/freedreno/a6xx/fd6_screen.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_screen.c
@@ -25,17 +25,37 @@
  *    Rob Clark <robclark@freedesktop.org>
  */
 
+#include "drm-uapi/drm_fourcc.h"
 #include "pipe/p_screen.h"
 #include "util/u_format.h"
 
 #include "fd6_screen.h"
+#include "fd6_blitter.h"
 #include "fd6_context.h"
 #include "fd6_format.h"
 #include "fd6_resource.h"
 
 #include "ir3/ir3_compiler.h"
 
-static boolean
+static bool
+valid_sample_count(unsigned sample_count)
+{
+       switch (sample_count) {
+       case 0:
+       case 1:
+       case 2:
+       case 4:
+// TODO seems 8x works, but increases lrz width or height.. but the
+// blob I have doesn't seem to expose any egl configs w/ 8x, so
+// just hide it for now and revisit later.
+//     case 8:
+               return true;
+       default:
+               return false;
+       }
+}
+
+static bool
 fd6_screen_is_format_supported(struct pipe_screen *pscreen,
                enum pipe_format format,
                enum pipe_texture_target target,
@@ -46,10 +66,10 @@ fd6_screen_is_format_supported(struct pipe_screen *pscreen,
        unsigned retval = 0;
 
        if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
-                       (sample_count > 1)) { /* TODO add MSAA */
+                       !valid_sample_count(sample_count)) {
                DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x",
                                util_format_name(format), target, sample_count, usage);
-               return FALSE;
+               return false;
        }
 
        if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
@@ -60,11 +80,11 @@ fd6_screen_is_format_supported(struct pipe_screen *pscreen,
                retval |= PIPE_BIND_VERTEX_BUFFER;
        }
 
-       if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
+       if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE)) &&
                        (target == PIPE_BUFFER ||
                         util_format_get_blocksize(format) != 12) &&
                        (fd6_pipe2tex(format) != (enum a6xx_tex_fmt)~0)) {
-               retval |= PIPE_BIND_SAMPLER_VIEW;
+               retval |= usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE);
        }
 
        if ((usage & (PIPE_BIND_RENDER_TARGET |
@@ -106,6 +126,9 @@ fd6_screen_is_format_supported(struct pipe_screen *pscreen,
        return retval == usage;
 }
 
+extern const struct fd_perfcntr_group a6xx_perfcntr_groups[];
+extern const unsigned a6xx_num_perfcntr_groups;
+
 void
 fd6_screen_init(struct pipe_screen *pscreen)
 {
@@ -116,4 +139,19 @@ fd6_screen_init(struct pipe_screen *pscreen)
        pscreen->is_format_supported = fd6_screen_is_format_supported;
 
        screen->setup_slices = fd6_setup_slices;
+       screen->tile_mode = fd6_tile_mode;
+       screen->fill_ubwc_buffer_sizes = fd6_fill_ubwc_buffer_sizes;
+
+       static const uint64_t supported_modifiers[] = {
+               DRM_FORMAT_MOD_LINEAR,
+               DRM_FORMAT_MOD_QCOM_COMPRESSED,
+       };
+
+       screen->supported_modifiers = supported_modifiers;
+       screen->num_supported_modifiers = ARRAY_SIZE(supported_modifiers);
+
+       if (fd_mesa_debug & FD_DBG_PERFC) {
+               screen->perfcntr_groups = a6xx_perfcntr_groups;
+               screen->num_perfcntr_groups = a6xx_num_perfcntr_groups;
+       }
 }