src/gallium/drivers/freedreno/a6xx/fd6_screen.c

   1 /*
   2  * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
   3  * Copyright © 2018 Google, Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  22  * SOFTWARE.
  23  *
  24  * Authors:
  25  *    Rob Clark <robclark@freedesktop.org>
  26  */
  27
  28 #include "drm-uapi/drm_fourcc.h"
  29 #include "pipe/p_screen.h"
  30 #include "util/u_format.h"
  31
  32 #include "fd6_screen.h"
  33 #include "fd6_blitter.h"
  34 #include "fd6_context.h"
  35 #include "fd6_format.h"
  36 #include "fd6_resource.h"
  37
  38 #include "ir3/ir3_compiler.h"
  39
  40 static bool
  41 valid_sample_count(unsigned sample_count)
  42 {
  43         switch (sample_count) {
  44         case 0:
  45         case 1:
  46         case 2:
  47         case 4:
  48 // TODO seems 8x works, but increases lrz width or height.. but the
  49 // blob I have doesn't seem to expose any egl configs w/ 8x, so
  50 // just hide it for now and revisit later.
  51 //      case 8:
  52                 return true;
  53         default:
  54                 return false;
  55         }
  56 }
  57
  58 static bool
  59 fd6_screen_is_format_supported(struct pipe_screen *pscreen,
  60                 enum pipe_format format,
  61                 enum pipe_texture_target target,
  62                 unsigned sample_count,
  63                 unsigned storage_sample_count,
  64                 unsigned usage)
  65 {
  66         unsigned retval = 0;
  67
  68         if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
  69                         !valid_sample_count(sample_count)) {
  70                 DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x",
  71                                 util_format_name(format), target, sample_count, usage);
  72                 return false;
  73         }
  74
  75         if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
  76                 return false;
  77
  78         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
  79                         (fd6_pipe2vtx(format) != (enum a6xx_vtx_fmt)~0)) {
  80                 retval |= PIPE_BIND_VERTEX_BUFFER;
  81         }
  82
  83         if ((usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE)) &&
  84                         (target == PIPE_BUFFER ||
  85                          util_format_get_blocksize(format) != 12) &&
  86                         (fd6_pipe2tex(format) != (enum a6xx_tex_fmt)~0)) {
  87                 retval |= usage & (PIPE_BIND_SAMPLER_VIEW | PIPE_BIND_SHADER_IMAGE);
  88         }
  89
  90         if ((usage & (PIPE_BIND_RENDER_TARGET |
  91                                 PIPE_BIND_DISPLAY_TARGET |
  92                                 PIPE_BIND_SCANOUT |
  93                                 PIPE_BIND_SHARED |
  94                                 PIPE_BIND_COMPUTE_RESOURCE)) &&
  95                         (fd6_pipe2color(format) != (enum a6xx_color_fmt)~0) &&
  96                         (fd6_pipe2tex(format) != (enum a6xx_tex_fmt)~0)) {
  97                 retval |= usage & (PIPE_BIND_RENDER_TARGET |
  98                                 PIPE_BIND_DISPLAY_TARGET |
  99                                 PIPE_BIND_SCANOUT |
 100                                 PIPE_BIND_SHARED |
 101                                 PIPE_BIND_COMPUTE_RESOURCE);
 102         }
 103
 104         /* For ARB_framebuffer_no_attachments: */
 105         if ((usage & PIPE_BIND_RENDER_TARGET) && (format == PIPE_FORMAT_NONE)) {
 106                 retval |= usage & PIPE_BIND_RENDER_TARGET;
 107         }
 108
 109         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 110                         (fd6_pipe2depth(format) != (enum a6xx_depth_format)~0) &&
 111                         (fd6_pipe2tex(format) != (enum a6xx_tex_fmt)~0)) {
 112                 retval |= PIPE_BIND_DEPTH_STENCIL;
 113         }
 114
 115         if ((usage & PIPE_BIND_INDEX_BUFFER) &&
 116                         (fd_pipe2index(format) != (enum pc_di_index_size)~0)) {
 117                 retval |= PIPE_BIND_INDEX_BUFFER;
 118         }
 119
 120         if (retval != usage) {
 121                 DBG("not supported: format=%s, target=%d, sample_count=%d, "
 122                                 "usage=%x, retval=%x", util_format_name(format),
 123                                 target, sample_count, usage, retval);
 124         }
 125
 126         return retval == usage;
 127 }
 128
 129 extern const struct fd_perfcntr_group a6xx_perfcntr_groups[];
 130 extern const unsigned a6xx_num_perfcntr_groups;
 131
 132 void
 133 fd6_screen_init(struct pipe_screen *pscreen)
 134 {
 135         struct fd_screen *screen = fd_screen(pscreen);
 136         screen->max_rts = A6XX_MAX_RENDER_TARGETS;
 137         screen->compiler = ir3_compiler_create(screen->dev, screen->gpu_id);
 138         pscreen->context_create = fd6_context_create;
 139         pscreen->is_format_supported = fd6_screen_is_format_supported;
 140
 141         screen->setup_slices = fd6_setup_slices;
 142         screen->tile_mode = fd6_tile_mode;
 143         screen->fill_ubwc_buffer_sizes = fd6_fill_ubwc_buffer_sizes;
 144
 145         static const uint64_t supported_modifiers[] = {
 146                 DRM_FORMAT_MOD_LINEAR,
 147                 DRM_FORMAT_MOD_QCOM_COMPRESSED,
 148         };
 149
 150         screen->supported_modifiers = supported_modifiers;
 151         screen->num_supported_modifiers = ARRAY_SIZE(supported_modifiers);
 152
 153         if (fd_mesa_debug & FD_DBG_PERFC) {
 154                 screen->perfcntr_groups = a6xx_perfcntr_groups;
 155                 screen->num_perfcntr_groups = a6xx_num_perfcntr_groups;
 156         }
 157 }