shader-packing

[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_target_gm107.cpp

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
index 04cbd402a1802d74fb295ae55319a2b8293afe29..2e2e40770e137986dd41c970adf6a5ccc56032a3 100644 (file)
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_gm107.cpp
@@ -57,10 +57,17 @@ TargetGM107::isOpSupported(operation op, DataType ty) const
    switch (op) {
    case OP_SAD:
    case OP_POW:
-   case OP_SQRT:
    case OP_DIV:
    case OP_MOD:
       return false;
+   case OP_SQRT:
+      if (ty == TYPE_F64)
+         return false;
+      return chipset >= NVISA_GM200_CHIPSET;
+   case OP_XMAD:
+      if (isFloatType(ty))
+         return false;
+      break;
    default:
       break;
    }
@@ -125,6 +132,7 @@ TargetGM107::isBarrierRequired(const Instruction *insn) const
       case OP_RCP:
       case OP_RSQ:
       case OP_SIN:
+      case OP_SQRT:
          return true;
       default:
          break;
@@ -153,15 +161,15 @@ TargetGM107::isBarrierRequired(const Instruction *insn) const
       case OP_AFETCH:
       case OP_PFETCH:
       case OP_PIXLD:
-      case OP_RDSV:
       case OP_SHFL:
          return true;
+      case OP_RDSV:
+         return !isCS2RSV(insn->getSrc(0)->reg.data.sv.sv);
       default:
          break;
       }
       break;
    case OPCLASS_ARITH:
-      // TODO: IMUL/IMAD require barriers too, use of XMAD instead!
       if ((insn->op == OP_MUL || insn->op == OP_MAD) &&
           !isFloatType(insn->dType))
          return true;
@@ -229,9 +237,12 @@ TargetGM107::getLatency(const Instruction *insn) const
    case OP_SUB:
    case OP_VOTE:
    case OP_XOR:
+   case OP_XMAD:
       if (insn->dType != TYPE_F64)
          return 6;
       break;
+   case OP_RDSV:
+      return isCS2RSV(insn->getSrc(0)->reg.data.sv.sv) ? 6 : 15;
    case OP_ABS:
    case OP_CEIL:
    case OP_CVT:
@@ -253,6 +264,7 @@ TargetGM107::getLatency(const Instruction *insn) const
    case OP_RCP:
    case OP_RSQ:
    case OP_SIN:
+   case OP_SQRT:
       return 13;
    default:
       break;
@@ -281,6 +293,7 @@ TargetGM107::getReadLatency(const Instruction *insn) const
    case OP_RSQ:
    case OP_SAT:
    case OP_SIN:
+   case OP_SQRT:
    case OP_SULDB:
    case OP_SULDP:
    case OP_SUREDB:
@@ -321,6 +334,12 @@ TargetGM107::getReadLatency(const Instruction *insn) const
    return 0;
 }
 
+bool
+TargetGM107::isCS2RSV(SVSemantic sv) const
+{
+   return sv == SV_CLOCK;
+}
+
 bool
 TargetGM107::runLegalizePass(Program *prog, CGStage stage) const
 {