Merge remote branch 'origin/master' into pipe-video

[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 8a62d646d3ab27cf2631dc7d6c7b6c24ac2e448f..69cb5f7751fedfb5a09c4ca8d437233b207fca1d 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -35,7 +35,6 @@
 #include <util/u_pack_color.h>
 #include <util/u_memory.h>
 #include <util/u_inlines.h>
-#include <util/u_upload_mgr.h>
 #include <pipebuffer/pb_buffer.h>
 #include "r600.h"
 #include "r600d.h"
@@ -60,9 +59,6 @@ static void r600_flush(struct pipe_context *ctx, unsigned flags,
        if (!rctx->ctx.pm4_cdwords)
                return;
 
-       u_upload_flush(rctx->upload_vb);
-       u_upload_flush(rctx->upload_ib);
-
 #if 0
        sprintf(dname, "gallium-%08d.bof", dc);
        if (dc < 20) {
@@ -72,6 +68,8 @@ static void r600_flush(struct pipe_context *ctx, unsigned flags,
        dc++;
 #endif
        r600_context_flush(&rctx->ctx);
+
+       r600_upload_flush(rctx->rupload_vb);
 }
 
 static void r600_destroy_context(struct pipe_context *context)
@@ -80,6 +78,8 @@ static void r600_destroy_context(struct pipe_context *context)
 
        rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
 
+       r600_end_vertex_translate(rctx);
+
        r600_context_fini(&rctx->ctx);
 
        util_blitter_destroy(rctx->blitter);
@@ -88,8 +88,7 @@ static void r600_destroy_context(struct pipe_context *context)
                free(rctx->states[i]);
        }
 
-       u_upload_destroy(rctx->upload_vb);
-       u_upload_destroy(rctx->upload_ib);
+       r600_upload_destroy(rctx->rupload_vb);
 
        if (rctx->tran.translate_cache)
                translate_cache_destroy(rctx->tran.translate_cache);
@@ -121,6 +120,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
        r600_init_blit_functions(rctx);
        r600_init_query_functions(rctx);
        r600_init_context_resource_functions(rctx);
+       r600_init_surface_functions(rctx);
 
        switch (r600_get_family(rctx->radeon)) {
        case CHIP_R600:
@@ -148,6 +148,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
        case CHIP_JUNIPER:
        case CHIP_CYPRESS:
        case CHIP_HEMLOCK:
+       case CHIP_PALM:
                rctx->context.draw_vbo = evergreen_draw;
                evergreen_init_state_functions(rctx);
                if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
@@ -162,16 +163,8 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
                return NULL;
        }
 
-       rctx->upload_ib = u_upload_create(&rctx->context, 32 * 1024, 16,
-                                         PIPE_BIND_INDEX_BUFFER);
-       if (rctx->upload_ib == NULL) {
-               r600_destroy_context(&rctx->context);
-               return NULL;
-       }
-
-       rctx->upload_vb = u_upload_create(&rctx->context, 128 * 1024, 16,
-                                         PIPE_BIND_VERTEX_BUFFER);
-       if (rctx->upload_vb == NULL) {
+       rctx->rupload_vb = r600_upload_create(rctx, 128 * 1024, 16);
+       if (rctx->rupload_vb == NULL) {
                r600_destroy_context(&rctx->context);
                return NULL;
        }
@@ -187,7 +180,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
                FREE(rctx);
                return NULL;
        }
-       
+
        rctx->vs_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
        if (!rctx->vs_resource) {
                FREE(rctx);
@@ -239,6 +232,7 @@ static const char *r600_get_family_name(enum radeon_family family)
        case CHIP_JUNIPER: return "AMD JUNIPER";
        case CHIP_CYPRESS: return "AMD CYPRESS";
        case CHIP_HEMLOCK: return "AMD HEMLOCK";
+       case CHIP_PALM: return "AMD PALM";
        default: return "AMD unknown";
        }
 }
@@ -253,6 +247,9 @@ static const char* r600_get_name(struct pipe_screen* pscreen)
 
 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 {
+       struct r600_screen *rscreen = (struct r600_screen *)pscreen;
+       enum radeon_family family = r600_get_family(rscreen->radeon);
+
        switch (param) {
        /* Supported features (boolean caps). */
        case PIPE_CAP_NPOT_TEXTURES:
@@ -285,7 +282,10 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
        case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
        case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
-               return 14;
+               if (family >= CHIP_CEDAR)
+                       return 15;
+               else
+                       return 14;
        case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
                /* FIXME allow this once infrastructure is there */
                return 16;
@@ -314,12 +314,18 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 
 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 {
+       struct r600_screen *rscreen = (struct r600_screen *)pscreen;
+       enum radeon_family family = r600_get_family(rscreen->radeon);
+
        switch (param) {
        case PIPE_CAP_MAX_LINE_WIDTH:
        case PIPE_CAP_MAX_LINE_WIDTH_AA:
        case PIPE_CAP_MAX_POINT_WIDTH:
        case PIPE_CAP_MAX_POINT_WIDTH_AA:
-               return 8192.0f;
+               if (family >= CHIP_CEDAR)
+                       return 16384.0f;
+               else
+                       return 8192.0f;
        case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
                return 16.0f;
        case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
@@ -371,6 +377,13 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
                return 0; /* FIXME */
        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
                return 1;
+       case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
+       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
+       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
+       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
+               return 1;
+       case PIPE_SHADER_CAP_SUBROUTINES:
+               return 0;
        default:
                return 0;
        }
@@ -399,10 +412,10 @@ static boolean r600_is_format_supported(struct pipe_screen* screen,
        }
 
        if ((usage & (PIPE_BIND_RENDER_TARGET |
-                  PIPE_BIND_DISPLAY_TARGET |
-                  PIPE_BIND_SCANOUT |
-                  PIPE_BIND_SHARED)) &&
-           r600_is_colorbuffer_format_supported(format)) {
+                       PIPE_BIND_DISPLAY_TARGET |
+                       PIPE_BIND_SCANOUT |
+                       PIPE_BIND_SHARED)) &&
+                       r600_is_colorbuffer_format_supported(format)) {
                retval |= usage &
                        (PIPE_BIND_RENDER_TARGET |
                         PIPE_BIND_DISPLAY_TARGET |
@@ -460,7 +473,6 @@ struct pipe_screen *r600_screen_create(struct radeon *radeon)
        rscreen->screen.is_format_supported = r600_is_format_supported;
        rscreen->screen.context_create = r600_create_context;
        rscreen->screen.video_context_create = r600_video_create;
-       r600_init_screen_texture_functions(&rscreen->screen);
        r600_init_screen_resource_functions(&rscreen->screen);
 
        rscreen->tiling_info = r600_get_tiling_info(radeon);