src/gallium/drivers/r600/r600_pipe.c

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include <stdio.h>
  24 #include <errno.h>
  25 #include <pipe/p_defines.h>
  26 #include <pipe/p_state.h>
  27 #include <pipe/p_context.h>
  28 #include <tgsi/tgsi_scan.h>
  29 #include <tgsi/tgsi_parse.h>
  30 #include <tgsi/tgsi_util.h>
  31 #include <util/u_blitter.h>
  32 #include <util/u_double_list.h>
  33 #include <util/u_transfer.h>
  34 #include <util/u_surface.h>
  35 #include <util/u_pack_color.h>
  36 #include <util/u_memory.h>
  37 #include <util/u_inlines.h>
  38 #include <util/u_upload_mgr.h>
  39 #include <pipebuffer/pb_buffer.h>
  40 #include "r600.h"
  41 #include "r600d.h"
  42 #include "r600_resource.h"
  43 #include "r600_shader.h"
  44 #include "r600_pipe.h"
  45 #include "r600_state_inlines.h"
  46 #include "r600_video_context.h"
  47
  48 /*
  49  * pipe_context
  50  */
  51 static void r600_flush(struct pipe_context *ctx, unsigned flags,
  52                         struct pipe_fence_handle **fence)
  53 {
  54         struct r600_pipe_context *rctx = (struct r600_pipe_context *)ctx;
  55 #if 0
  56         static int dc = 0;
  57         char dname[256];
  58 #endif
  59
  60         if (!rctx->ctx.pm4_cdwords)
  61                 return;
  62
  63         u_upload_flush(rctx->upload_vb);
  64         u_upload_flush(rctx->upload_ib);
  65
  66 #if 0
  67         sprintf(dname, "gallium-%08d.bof", dc);
  68         if (dc < 20) {
  69                 r600_context_dump_bof(&rctx->ctx, dname);
  70                 R600_ERR("dumped %s\n", dname);
  71         }
  72         dc++;
  73 #endif
  74         r600_context_flush(&rctx->ctx);
  75 }
  76
  77 static void r600_destroy_context(struct pipe_context *context)
  78 {
  79         struct r600_pipe_context *rctx = (struct r600_pipe_context *)context;
  80
  81         rctx->context.delete_depth_stencil_alpha_state(&rctx->context, rctx->custom_dsa_flush);
  82
  83         r600_context_fini(&rctx->ctx);
  84
  85         util_blitter_destroy(rctx->blitter);
  86
  87         for (int i = 0; i < R600_PIPE_NSTATES; i++) {
  88                 free(rctx->states[i]);
  89         }
  90
  91         u_upload_destroy(rctx->upload_vb);
  92         u_upload_destroy(rctx->upload_ib);
  93
  94         if (rctx->tran.translate_cache)
  95                 translate_cache_destroy(rctx->tran.translate_cache);
  96
  97         FREE(rctx->ps_resource);
  98         FREE(rctx->vs_resource);
  99         FREE(rctx);
 100 }
 101
 102 static struct pipe_context *r600_create_context(struct pipe_screen *screen, void *priv)
 103 {
 104         struct r600_pipe_context *rctx = CALLOC_STRUCT(r600_pipe_context);
 105         struct r600_screen* rscreen = (struct r600_screen *)screen;
 106         enum chip_class class;
 107
 108         if (rctx == NULL)
 109                 return NULL;
 110         rctx->context.winsys = rscreen->screen.winsys;
 111         rctx->context.screen = screen;
 112         rctx->context.priv = priv;
 113         rctx->context.destroy = r600_destroy_context;
 114         rctx->context.flush = r600_flush;
 115
 116         /* Easy accessing of screen/winsys. */
 117         rctx->screen = rscreen;
 118         rctx->radeon = rscreen->radeon;
 119         rctx->family = r600_get_family(rctx->radeon);
 120
 121         r600_init_blit_functions(rctx);
 122         r600_init_query_functions(rctx);
 123         r600_init_context_resource_functions(rctx);
 124
 125         switch (r600_get_family(rctx->radeon)) {
 126         case CHIP_R600:
 127         case CHIP_RV610:
 128         case CHIP_RV630:
 129         case CHIP_RV670:
 130         case CHIP_RV620:
 131         case CHIP_RV635:
 132         case CHIP_RS780:
 133         case CHIP_RS880:
 134         case CHIP_RV770:
 135         case CHIP_RV730:
 136         case CHIP_RV710:
 137         case CHIP_RV740:
 138                 rctx->context.draw_vbo = r600_draw_vbo;
 139                 r600_init_state_functions(rctx);
 140                 if (r600_context_init(&rctx->ctx, rctx->radeon)) {
 141                         r600_destroy_context(&rctx->context);
 142                         return NULL;
 143                 }
 144                 r600_init_config(rctx);
 145                 break;
 146         case CHIP_CEDAR:
 147         case CHIP_REDWOOD:
 148         case CHIP_JUNIPER:
 149         case CHIP_CYPRESS:
 150         case CHIP_HEMLOCK:
 151                 rctx->context.draw_vbo = evergreen_draw;
 152                 evergreen_init_state_functions(rctx);
 153                 if (evergreen_context_init(&rctx->ctx, rctx->radeon)) {
 154                         r600_destroy_context(&rctx->context);
 155                         return NULL;
 156                 }
 157                 evergreen_init_config(rctx);
 158                 break;
 159         default:
 160                 R600_ERR("unsupported family %d\n", r600_get_family(rctx->radeon));
 161                 r600_destroy_context(&rctx->context);
 162                 return NULL;
 163         }
 164
 165         rctx->upload_ib = u_upload_create(&rctx->context, 32 * 1024, 16,
 166                                           PIPE_BIND_INDEX_BUFFER);
 167         if (rctx->upload_ib == NULL) {
 168                 r600_destroy_context(&rctx->context);
 169                 return NULL;
 170         }
 171
 172         rctx->upload_vb = u_upload_create(&rctx->context, 128 * 1024, 16,
 173                                           PIPE_BIND_VERTEX_BUFFER);
 174         if (rctx->upload_vb == NULL) {
 175                 r600_destroy_context(&rctx->context);
 176                 return NULL;
 177         }
 178
 179         rctx->blitter = util_blitter_create(&rctx->context);
 180         if (rctx->blitter == NULL) {
 181                 FREE(rctx);
 182                 return NULL;
 183         }
 184
 185         rctx->tran.translate_cache = translate_cache_create();
 186         if (rctx->tran.translate_cache == NULL) {
 187                 FREE(rctx);
 188                 return NULL;
 189         }
 190
 191         rctx->vs_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 192         if (!rctx->vs_resource) {
 193                 FREE(rctx);
 194                 return NULL;
 195         }
 196
 197         rctx->ps_resource = CALLOC(R600_RESOURCE_ARRAY_SIZE, sizeof(struct r600_pipe_state));
 198         if (!rctx->ps_resource) {
 199                 FREE(rctx);
 200                 return NULL;
 201         }
 202
 203         class = r600_get_family_class(rctx->radeon);
 204         if (class == R600 || class == R700)
 205                 rctx->custom_dsa_flush = r600_create_db_flush_dsa(rctx);
 206         else
 207                 rctx->custom_dsa_flush = evergreen_create_db_flush_dsa(rctx);
 208
 209         r600_blit_uncompress_depth_ptr = r600_blit_uncompress_depth;
 210
 211         return &rctx->context;
 212 }
 213
 214 /*
 215  * pipe_screen
 216  */
 217 static const char* r600_get_vendor(struct pipe_screen* pscreen)
 218 {
 219         return "X.Org";
 220 }
 221
 222 static const char *r600_get_family_name(enum radeon_family family)
 223 {
 224         switch(family) {
 225         case CHIP_R600: return "AMD R600";
 226         case CHIP_RV610: return "AMD RV610";
 227         case CHIP_RV630: return "AMD RV630";
 228         case CHIP_RV670: return "AMD RV670";
 229         case CHIP_RV620: return "AMD RV620";
 230         case CHIP_RV635: return "AMD RV635";
 231         case CHIP_RS780: return "AMD RS780";
 232         case CHIP_RS880: return "AMD RS880";
 233         case CHIP_RV770: return "AMD RV770";
 234         case CHIP_RV730: return "AMD RV730";
 235         case CHIP_RV710: return "AMD RV710";
 236         case CHIP_RV740: return "AMD RV740";
 237         case CHIP_CEDAR: return "AMD CEDAR";
 238         case CHIP_REDWOOD: return "AMD REDWOOD";
 239         case CHIP_JUNIPER: return "AMD JUNIPER";
 240         case CHIP_CYPRESS: return "AMD CYPRESS";
 241         case CHIP_HEMLOCK: return "AMD HEMLOCK";
 242         default: return "AMD unknown";
 243         }
 244 }
 245
 246 static const char* r600_get_name(struct pipe_screen* pscreen)
 247 {
 248         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 249         enum radeon_family family = r600_get_family(rscreen->radeon);
 250
 251         return r600_get_family_name(family);
 252 }
 253
 254 static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
 255 {
 256         switch (param) {
 257         /* Supported features (boolean caps). */
 258         case PIPE_CAP_NPOT_TEXTURES:
 259         case PIPE_CAP_TWO_SIDED_STENCIL:
 260         case PIPE_CAP_GLSL:
 261         case PIPE_CAP_DUAL_SOURCE_BLEND:
 262         case PIPE_CAP_ANISOTROPIC_FILTER:
 263         case PIPE_CAP_POINT_SPRITE:
 264         case PIPE_CAP_OCCLUSION_QUERY:
 265         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 266         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 267         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 268         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 269         case PIPE_CAP_SM3:
 270         case PIPE_CAP_TEXTURE_SWIZZLE:
 271         case PIPE_CAP_INDEP_BLEND_ENABLE:
 272         case PIPE_CAP_DEPTHSTENCIL_CLEAR_SEPARATE:
 273         case PIPE_CAP_DEPTH_CLAMP:
 274         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 275                 return 1;
 276
 277         /* Unsupported features (boolean caps). */
 278         case PIPE_CAP_TIMER_QUERY:
 279         case PIPE_CAP_STREAM_OUTPUT:
 280         case PIPE_CAP_PRIMITIVE_RESTART:
 281         case PIPE_CAP_INDEP_BLEND_FUNC: /* FIXME allow this */
 282                 return 0;
 283
 284         /* Texturing. */
 285         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 286         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 287         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 288                 return 14;
 289         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
 290                 /* FIXME allow this once infrastructure is there */
 291                 return 16;
 292         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
 293         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
 294                 return 16;
 295
 296         /* Render targets. */
 297         case PIPE_CAP_MAX_RENDER_TARGETS:
 298                 /* FIXME some r6xx are buggy and can only do 4 */
 299                 return 8;
 300
 301         /* Fragment coordinate conventions. */
 302         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 303         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 304                 return 1;
 305         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 306         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 307                 return 0;
 308
 309         default:
 310                 R600_ERR("r600: unknown param %d\n", param);
 311                 return 0;
 312         }
 313 }
 314
 315 static float r600_get_paramf(struct pipe_screen* pscreen, enum pipe_cap param)
 316 {
 317         switch (param) {
 318         case PIPE_CAP_MAX_LINE_WIDTH:
 319         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 320         case PIPE_CAP_MAX_POINT_WIDTH:
 321         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 322                 return 8192.0f;
 323         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 324                 return 16.0f;
 325         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 326                 return 16.0f;
 327         default:
 328                 R600_ERR("r600: unsupported paramf %d\n", param);
 329                 return 0.0f;
 330         }
 331 }
 332
 333 static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enum pipe_shader_cap param)
 334 {
 335         switch(shader)
 336         {
 337         case PIPE_SHADER_FRAGMENT:
 338         case PIPE_SHADER_VERTEX:
 339                 break;
 340         case PIPE_SHADER_GEOMETRY:
 341                 /* TODO: support and enable geometry programs */
 342                 return 0;
 343         default:
 344                 /* TODO: support tessellation on Evergreen */
 345                 return 0;
 346         }
 347
 348         /* TODO: all these should be fixed, since r600 surely supports much more! */
 349         switch (param) {
 350         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 351         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 352         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 353         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 354                 return 16384;
 355         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 356                 return 8; /* FIXME */
 357         case PIPE_SHADER_CAP_MAX_INPUTS:
 358                 if(shader == PIPE_SHADER_FRAGMENT)
 359                         return 10;
 360                 else
 361                         return 16;
 362         case PIPE_SHADER_CAP_MAX_TEMPS:
 363                 return 256; //max native temporaries
 364         case PIPE_SHADER_CAP_MAX_ADDRS:
 365                 return 1; //max native address registers/* FIXME Isn't this equal to TEMPS? */
 366         case PIPE_SHADER_CAP_MAX_CONSTS:
 367                 return 256; //max native parameters
 368         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 369                 return 1;
 370         case PIPE_SHADER_CAP_MAX_PREDS:
 371                 return 0; /* FIXME */
 372         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 373                 return 1;
 374         default:
 375                 return 0;
 376         }
 377 }
 378
 379 static boolean r600_is_format_supported(struct pipe_screen* screen,
 380                                         enum pipe_format format,
 381                                         enum pipe_texture_target target,
 382                                         unsigned sample_count,
 383                                         unsigned usage,
 384                                         unsigned geom_flags)
 385 {
 386         unsigned retval = 0;
 387         if (target >= PIPE_MAX_TEXTURE_TYPES) {
 388                 R600_ERR("r600: unsupported texture type %d\n", target);
 389                 return FALSE;
 390         }
 391
 392         /* Multisample */
 393         if (sample_count > 1)
 394                 return FALSE;
 395
 396         if ((usage & PIPE_BIND_SAMPLER_VIEW) &&
 397             r600_is_sampler_format_supported(format)) {
 398                 retval |= PIPE_BIND_SAMPLER_VIEW;
 399         }
 400
 401         if ((usage & (PIPE_BIND_RENDER_TARGET |
 402                   PIPE_BIND_DISPLAY_TARGET |
 403                   PIPE_BIND_SCANOUT |
 404                   PIPE_BIND_SHARED)) &&
 405             r600_is_colorbuffer_format_supported(format)) {
 406                 retval |= usage &
 407                         (PIPE_BIND_RENDER_TARGET |
 408                          PIPE_BIND_DISPLAY_TARGET |
 409                          PIPE_BIND_SCANOUT |
 410                          PIPE_BIND_SHARED);
 411         }
 412
 413         if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
 414             r600_is_zs_format_supported(format)) {
 415                 retval |= PIPE_BIND_DEPTH_STENCIL;
 416         }
 417
 418         if ((usage & PIPE_BIND_VERTEX_BUFFER) &&
 419             r600_is_vertex_format_supported(format))
 420                 retval |= PIPE_BIND_VERTEX_BUFFER;
 421
 422         if (usage & PIPE_BIND_TRANSFER_READ)
 423                 retval |= PIPE_BIND_TRANSFER_READ;
 424         if (usage & PIPE_BIND_TRANSFER_WRITE)
 425                 retval |= PIPE_BIND_TRANSFER_WRITE;
 426
 427         return retval == usage;
 428 }
 429
 430 static void r600_destroy_screen(struct pipe_screen* pscreen)
 431 {
 432         struct r600_screen *rscreen = (struct r600_screen *)pscreen;
 433
 434         if (rscreen == NULL)
 435                 return;
 436
 437         radeon_decref(rscreen->radeon);
 438
 439         FREE(rscreen);
 440 }
 441
 442
 443 struct pipe_screen *r600_screen_create(struct radeon *radeon)
 444 {
 445         struct r600_screen *rscreen;
 446
 447         rscreen = CALLOC_STRUCT(r600_screen);
 448         if (rscreen == NULL) {
 449                 return NULL;
 450         }
 451
 452         rscreen->radeon = radeon;
 453         rscreen->screen.winsys = (struct pipe_winsys*)radeon;
 454         rscreen->screen.destroy = r600_destroy_screen;
 455         rscreen->screen.get_name = r600_get_name;
 456         rscreen->screen.get_vendor = r600_get_vendor;
 457         rscreen->screen.get_param = r600_get_param;
 458         rscreen->screen.get_shader_param = r600_get_shader_param;
 459         rscreen->screen.get_paramf = r600_get_paramf;
 460         rscreen->screen.is_format_supported = r600_is_format_supported;
 461         rscreen->screen.context_create = r600_create_context;
 462         rscreen->screen.video_context_create = r600_video_create;
 463         r600_init_screen_texture_functions(&rscreen->screen);
 464         r600_init_screen_resource_functions(&rscreen->screen);
 465
 466         rscreen->tiling_info = r600_get_tiling_info(radeon);
 467
 468         return &rscreen->screen;
 469 }