gallium: add PIPE_CAP_TGSI_VOTE for when the VOTE ops are allowed

[mesa.git] / src / gallium / drivers / r600 / r600_pipe.c

diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index b80119179070d4f2faf193b1898636431690944e..a49b00f789125f44fcc475abccacafcc929e936a 100644 (file)
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -187,7 +187,7 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
                                       r600_context_gfx_flush, rctx);
        rctx->b.gfx.flush = r600_context_gfx_flush;
 
-       rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024, 256,
+       rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024,
                                                             0, PIPE_USAGE_DEFAULT, FALSE);
        if (!rctx->allocator_fetch_shader)
                goto fail;
@@ -264,7 +264,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_START_INSTANCE:
        case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
        case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
-        case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
+       case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
        case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
        case PIPE_CAP_TEXTURE_MULTISAMPLE:
        case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
@@ -281,6 +281,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_INVALIDATE_BUFFER:
        case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
        case PIPE_CAP_QUERY_MEMORY_INFO:
+       case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
                return 1;
 
        case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
@@ -364,6 +365,10 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
        case PIPE_CAP_GENERATE_MIPMAP:
        case PIPE_CAP_STRING_MARKER:
        case PIPE_CAP_QUERY_BUFFER_OBJECT:
+       case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
+       case PIPE_CAP_CULL_DISTANCE:
+       case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
+       case PIPE_CAP_TGSI_VOTE:
                return 0;
 
        case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
@@ -499,7 +504,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen, unsigned shader, e
        case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
                if (shader == PIPE_SHADER_COMPUTE) {
                        uint64_t max_const_buffer_size;
-                       pscreen->get_compute_param(pscreen,
+                       pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_TGSI,
                                PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
                                &max_const_buffer_size);
                        return max_const_buffer_size;
@@ -705,5 +710,8 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws)
        }
 #endif
 
+       if (rscreen->b.debug_flags & DBG_TEST_DMA)
+               r600_test_dma(&rscreen->b);
+
        return &rscreen->b.b;
 }