#include "util/u_queue.h"
#include "si_state.h"
-struct radeon_shader_binary;
-struct radeon_shader_reloc;
+struct ac_shader_binary;
#define SI_MAX_VS_OUTPUTS 40
SI_PARAM_TCS_OUT_LAYOUT,
/* Layout of LS outputs / TCS inputs
- * [0:12] = stride between patches in dwords = num_inputs * num_vertices * 4, max = 32*32*4
- * [13:20] = stride between vertices in dwords = num_inputs * 4, max = 32*4
+ * [8:20] = stride between patches in dwords = num_inputs * num_vertices * 4, max = 32*32*4
+ * [24:31] = stride between vertices in dwords = num_inputs * 4, max = 32*4
+ * (same layout as SI_PARAM_VS_STATE_BITS)
*/
SI_PARAM_TCS_IN_LAYOUT,
SI_NUM_PARAMS = SI_PARAM_POS_FIXED_PT + 9, /* +8 for COLOR[0..1] */
};
+/* Fields of driver-defined VS state SGPR. */
+/* Clamp vertex color output (only used in VS as VS). */
+#define S_VS_STATE_CLAMP_VERTEX_COLOR(x) (((unsigned)(x) & 0x1) << 0)
+#define C_VS_STATE_CLAMP_VERTEX_COLOR 0xFFFFFFFE
+#define S_VS_STATE_LS_OUT_PATCH_SIZE(x) (((unsigned)(x) & 0x1FFF) << 8)
+#define C_VS_STATE_LS_OUT_PATCH_SIZE 0xFFE000FF
+#define S_VS_STATE_LS_OUT_VERTEX_SIZE(x) (((unsigned)(x) & 0xFF) << 24)
+#define C_VS_STATE_LS_OUT_VERTEX_SIZE 0x00FFFFFF
+
/* SI-specific system values. */
enum {
TGSI_SEMANTIC_DEFAULT_TESSOUTER_SI = TGSI_SEMANTIC_COUNT,
SI_FIX_FETCH_RGBA_32_SSCALED,
SI_FIX_FETCH_RGBA_32_FIXED,
SI_FIX_FETCH_RGBX_32_FIXED,
+ SI_FIX_FETCH_RG_64_FLOAT,
+ SI_FIX_FETCH_RGB_64_FLOAT,
+ SI_FIX_FETCH_RGBA_64_FLOAT,
+ SI_FIX_FETCH_RGB_8, /* A = 1.0 */
+ SI_FIX_FETCH_RGB_8_INT, /* A = 1 */
+ SI_FIX_FETCH_RGB_16,
+ SI_FIX_FETCH_RGB_16_INT,
};
struct si_shader;
struct util_queue_fence ready;
struct si_compiler_ctx_state compiler_ctx_state;
- pipe_mutex mutex;
+ mtx_t mutex;
struct si_shader *first_variant; /* immutable after the first variant */
struct si_shader *last_variant; /* mutable */
* uploaded to a buffer).
*/
struct si_shader *main_shader_part;
+ struct si_shader *main_shader_part_ls; /* as_ls is set in the key */
+ struct si_shader *main_shader_part_es; /* as_es is set in the key */
struct si_shader *gs_copy_shader;
/* Common VS bits between the shader key and the prolog key. */
struct si_vs_prolog_bits {
- unsigned instance_divisors[SI_NUM_VERTEX_BUFFERS];
+ unsigned instance_divisors[SI_MAX_ATTRIBS];
};
/* Common VS bits between the shader key and the epilog key. */
/* Common TCS bits between the shader key and the epilog key. */
struct si_tcs_epilog_bits {
unsigned prim_mode:3;
+ unsigned tes_reads_tess_factors:1;
};
struct si_gs_prolog_bits {
struct si_ps_epilog_bits {
unsigned spi_shader_col_format;
unsigned color_is_int8:8;
+ unsigned color_is_int10:8;
unsigned last_cbuf:3;
unsigned alpha_func:3;
unsigned alpha_to_one:1;
struct si_shader_key {
/* Prolog and epilog flags. */
union {
- struct {
- struct si_ps_prolog_bits prolog;
- struct si_ps_epilog_bits epilog;
- } ps;
struct {
struct si_vs_prolog_bits prolog;
struct si_vs_epilog_bits epilog;
struct {
struct si_gs_prolog_bits prolog;
} gs;
+ struct {
+ struct si_ps_prolog_bits prolog;
+ struct si_ps_epilog_bits epilog;
+ } ps;
} part;
/* These two are initially set according to the NEXT_SHADER property,
* or guessed if the property doesn't seem correct.
*/
- unsigned as_es:1; /* export shader */
- unsigned as_ls:1; /* local shader */
+ unsigned as_es:1; /* export shader, which precedes GS */
+ unsigned as_ls:1; /* local shader, which precedes TCS */
/* Flags for monolithic compilation only. */
union {
struct {
- /* One nibble for every input: SI_FIX_FETCH_* enums. */
- uint64_t fix_fetch;
+ /* One byte for every input: SI_FIX_FETCH_* enums. */
+ uint8_t fix_fetch[SI_MAX_ATTRIBS];
} vs;
struct {
uint64_t inputs_to_copy; /* for fixed-func TCS */
bool is_gs_copy_shader;
/* The following data is all that's needed for binary shaders. */
- struct radeon_shader_binary binary;
+ struct ac_shader_binary binary;
struct si_shader_config config;
struct si_shader_info info;
struct si_shader_part {
struct si_shader_part *next;
union si_shader_part_key key;
- struct radeon_shader_binary binary;
+ struct ac_shader_binary binary;
struct si_shader_config config;
};
struct si_shader *shader,
struct pipe_debug_callback *debug);
int si_compile_llvm(struct si_screen *sscreen,
- struct radeon_shader_binary *binary,
+ struct ac_shader_binary *binary,
struct si_shader_config *conf,
LLVMTargetMachineRef tm,
LLVMModuleRef mod,
struct si_shader *shader,
struct si_shader_config *config,
uint64_t scratch_va);
-void si_shader_binary_read_config(struct radeon_shader_binary *binary,
+void si_shader_binary_read_config(struct ac_shader_binary *binary,
struct si_shader_config *conf,
unsigned symbol_offset);
unsigned si_get_spi_shader_z_format(bool writes_z, bool writes_stencil,
bool writes_samplemask);
+const char *si_get_shader_name(struct si_shader *shader, unsigned processor);
+
+/* Inline helpers. */
+
+/* Return the pointer to the main shader part's pointer. */
+static inline struct si_shader **
+si_get_main_shader_part(struct si_shader_selector *sel,
+ struct si_shader_key *key)
+{
+ if (key->as_ls)
+ return &sel->main_shader_part_ls;
+ if (key->as_es)
+ return &sel->main_shader_part_es;
+ return &sel->main_shader_part;
+}
#endif
projects / mesa.git / blobdiff