radeonsi: add si_shader_selector::vs_needs_prolog

[mesa.git] / src / gallium / drivers / radeonsi / si_state_shaders.c

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 99a5de22301b3eb5297d39744ed70c39614aecee..21185c37fa87a59504058d81449ea146a642dd14 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -113,7 +113,8 @@ static void *si_get_shader_binary(struct si_shader *shader)
        /* There is always a size of data followed by the data itself. */
        unsigned relocs_size = shader->binary.reloc_count *
                               sizeof(shader->binary.relocs[0]);
-       unsigned disasm_size = strlen(shader->binary.disasm_string) + 1;
+       unsigned disasm_size = shader->binary.disasm_string ?
+                              strlen(shader->binary.disasm_string) + 1 : 0;
        unsigned llvm_ir_size = shader->binary.llvm_ir_string ?
                                strlen(shader->binary.llvm_ir_string) + 1 : 0;
        unsigned size =
@@ -437,12 +438,14 @@ static struct si_pm4_state *si_get_shader_pm4_state(struct si_shader *shader)
        return shader->pm4;
 }
 
-static void si_shader_ls(struct si_shader *shader)
+static void si_shader_ls(struct si_screen *sscreen, struct si_shader *shader)
 {
        struct si_pm4_state *pm4;
        unsigned vgpr_comp_cnt;
        uint64_t va;
 
+       assert(sscreen->b.chip_class <= VI);
+
        pm4 = si_get_shader_pm4_state(shader);
        if (!pm4)
                return;
@@ -462,7 +465,7 @@ static void si_shader_ls(struct si_shader *shader)
                           S_00B528_VGPR_COMP_CNT(vgpr_comp_cnt) |
                           S_00B528_DX10_CLAMP(1) |
                           S_00B528_FLOAT_MODE(shader->config.float_mode);
-       shader->config.rsrc2 = S_00B52C_USER_SGPR(SI_LS_NUM_USER_SGPR) |
+       shader->config.rsrc2 = S_00B52C_USER_SGPR(SI_VS_NUM_USER_SGPR) |
                           S_00B52C_SCRATCH_EN(shader->config.scratch_bytes_per_wave > 0);
 }
 
@@ -499,6 +502,8 @@ static void si_shader_es(struct si_screen *sscreen, struct si_shader *shader)
        uint64_t va;
        unsigned oc_lds_en;
 
+       assert(sscreen->b.chip_class <= VI);
+
        pm4 = si_get_shader_pm4_state(shader);
        if (!pm4)
                return;
@@ -508,7 +513,7 @@ static void si_shader_es(struct si_screen *sscreen, struct si_shader *shader)
 
        if (shader->selector->type == PIPE_SHADER_VERTEX) {
                vgpr_comp_cnt = shader->info.uses_instanceid ? 3 : 0;
-               num_user_sgprs = SI_ES_NUM_USER_SGPR;
+               num_user_sgprs = SI_VS_NUM_USER_SGPR;
        } else if (shader->selector->type == PIPE_SHADER_TESS_EVAL) {
                vgpr_comp_cnt = 3; /* all components are needed for TES */
                num_user_sgprs = SI_TES_NUM_USER_SGPR;
@@ -578,8 +583,6 @@ static void si_shader_gs(struct si_shader *shader)
        if (!pm4)
                return;
 
-       si_pm4_set_reg(pm4, R_028A40_VGT_GS_MODE, si_vgt_gs_mode(shader->selector));
-
        offset = num_components[0] * sel->gs_max_out_vertices;
        si_pm4_set_reg(pm4, R_028A60_VGT_GSVS_RING_OFFSET_1, offset);
        if (max_stream >= 1)
@@ -926,7 +929,7 @@ static void si_shader_init_pm4_state(struct si_screen *sscreen,
        switch (shader->selector->type) {
        case PIPE_SHADER_VERTEX:
                if (shader->key.as_ls)
-                       si_shader_ls(shader);
+                       si_shader_ls(sscreen, shader);
                else if (shader->key.as_es)
                        si_shader_es(sscreen, shader);
                else
@@ -1607,6 +1610,10 @@ static void *si_create_shader_selector(struct pipe_context *ctx,
        sel->type = sel->info.processor;
        p_atomic_inc(&sscreen->b.num_shaders_created);
 
+       /* The prolog is a no-op if there are no inputs. */
+       sel->vs_needs_prolog = sel->type == PIPE_SHADER_VERTEX &&
+                              sel->info.num_inputs;
+
        /* Set which opcode uses which (i,j) pair. */
        if (sel->info.uses_persp_opcode_interp_centroid)
                sel->info.uses_persp_centroid = true;
@@ -1894,21 +1901,26 @@ static void si_delete_shader(struct si_context *sctx, struct si_shader *shader)
        if (shader->pm4) {
                switch (shader->selector->type) {
                case PIPE_SHADER_VERTEX:
-                       if (shader->key.as_ls)
+                       if (shader->key.as_ls) {
+                               assert(sctx->b.chip_class <= VI);
                                si_pm4_delete_state(sctx, ls, shader->pm4);
-                       else if (shader->key.as_es)
+                       } else if (shader->key.as_es) {
+                               assert(sctx->b.chip_class <= VI);
                                si_pm4_delete_state(sctx, es, shader->pm4);
-                       else
+                       } else {
                                si_pm4_delete_state(sctx, vs, shader->pm4);
+                       }
                        break;
                case PIPE_SHADER_TESS_CTRL:
                        si_pm4_delete_state(sctx, hs, shader->pm4);
                        break;
                case PIPE_SHADER_TESS_EVAL:
-                       if (shader->key.as_es)
+                       if (shader->key.as_es) {
+                               assert(sctx->b.chip_class <= VI);
                                si_pm4_delete_state(sctx, es, shader->pm4);
-                       else
+                       } else {
                                si_pm4_delete_state(sctx, vs, shader->pm4);
+                       }
                        break;
                case PIPE_SHADER_GEOMETRY:
                        if (shader->is_gs_copy_shader)
@@ -2398,13 +2410,13 @@ static void si_init_tess_factor_ring(struct si_context *sctx)
                max_offchip_buffers = MIN2(max_offchip_buffers, 126);
                break;
        case CIK:
+       case VI:
        case GFX9:
                max_offchip_buffers = MIN2(max_offchip_buffers, 508);
                break;
-       case VI:
        default:
-               max_offchip_buffers = MIN2(max_offchip_buffers, 512);
-               break;
+               assert(0);
+               return;
        }
 
        assert(!sctx->tf_ring);
@@ -2569,10 +2581,13 @@ bool si_update_shaders(struct si_context *sctx)
                }
 
                /* VS as LS */
-               r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state);
-               if (r)
-                       return false;
-               si_pm4_bind_state(sctx, ls, sctx->vs_shader.current->pm4);
+               if (sctx->b.chip_class <= VI) {
+                       r = si_shader_select(ctx, &sctx->vs_shader,
+                                            &compiler_state);
+                       if (r)
+                               return false;
+                       si_pm4_bind_state(sctx, ls, sctx->vs_shader.current->pm4);
+               }
 
                if (sctx->tcs_shader.cso) {
                        r = si_shader_select(ctx, &sctx->tcs_shader,
@@ -2595,27 +2610,36 @@ bool si_update_shaders(struct si_context *sctx)
                                          sctx->fixed_func_tcs_shader.current->pm4);
                }
 
-               r = si_shader_select(ctx, &sctx->tes_shader, &compiler_state);
-               if (r)
-                       return false;
-
                if (sctx->gs_shader.cso) {
                        /* TES as ES */
-                       si_pm4_bind_state(sctx, es, sctx->tes_shader.current->pm4);
+                       if (sctx->b.chip_class <= VI) {
+                               r = si_shader_select(ctx, &sctx->tes_shader,
+                                                    &compiler_state);
+                               if (r)
+                                       return false;
+                               si_pm4_bind_state(sctx, es, sctx->tes_shader.current->pm4);
+                       }
                } else {
                        /* TES as VS */
+                       r = si_shader_select(ctx, &sctx->tes_shader,
+                                            &compiler_state);
+                       if (r)
+                               return false;
                        si_pm4_bind_state(sctx, vs, sctx->tes_shader.current->pm4);
                        si_update_so(sctx, sctx->tes_shader.cso);
                }
        } else if (sctx->gs_shader.cso) {
-               /* VS as ES */
-               r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state);
-               if (r)
-                       return false;
-               si_pm4_bind_state(sctx, es, sctx->vs_shader.current->pm4);
+               if (sctx->b.chip_class <= VI) {
+                       /* VS as ES */
+                       r = si_shader_select(ctx, &sctx->vs_shader,
+                                            &compiler_state);
+                       if (r)
+                               return false;
+                       si_pm4_bind_state(sctx, es, sctx->vs_shader.current->pm4);
 
-               si_pm4_bind_state(sctx, ls, NULL);
-               si_pm4_bind_state(sctx, hs, NULL);
+                       si_pm4_bind_state(sctx, ls, NULL);
+                       si_pm4_bind_state(sctx, hs, NULL);
+               }
        } else {
                /* VS as VS */
                r = si_shader_select(ctx, &sctx->vs_shader, &compiler_state);
@@ -2641,7 +2665,8 @@ bool si_update_shaders(struct si_context *sctx)
                        return false;
        } else {
                si_pm4_bind_state(sctx, gs, NULL);
-               si_pm4_bind_state(sctx, es, NULL);
+               if (sctx->b.chip_class <= VI)
+                       si_pm4_bind_state(sctx, es, NULL);
        }
 
        si_update_vgt_shader_config(sctx);