/* Samplers */
unsigned num_samplers;
+ boolean sampler_view[PIPE_MAX_SAMPLERS]; /**< True if sampler view exists*/
ubyte sampler_target[PIPE_MAX_SAMPLERS]; /**< TGSI_TEXTURE_x */
ubyte sampler_return_type[PIPE_MAX_SAMPLERS]; /**< TGSI_RETURN_TYPE_x */
unsigned fragcoord_input_index; /**< real fragment position input reg */
unsigned fragcoord_tmp_index; /**< 1/w modified position temp reg */
+
+ /** Which texture units are doing shadow comparison in the FS code */
+ unsigned shadow_compare_units;
} fs;
/* For geometry shaders only */
* as seen below. All other opcodes are handled/translated specially.
*/
static VGPU10_OPCODE_TYPE
-translate_opcode(unsigned opcode)
+translate_opcode(enum tgsi_opcode opcode)
{
switch (opcode) {
case TGSI_OPCODE_MOV:
return VGPU10_OPCODE_RET;
case TGSI_OPCODE_NOP:
return VGPU10_OPCODE_NOP;
- case TGSI_OPCODE_BREAKC:
- return VGPU10_OPCODE_BREAKC;
case TGSI_OPCODE_END:
return VGPU10_OPCODE_RET;
case TGSI_OPCODE_F2I:
const enum tgsi_semantic sem_name = emit->info.output_semantic_name[index];
const unsigned sem_index = emit->info.output_semantic_index[index];
unsigned writemask = reg->Register.WriteMask;
- const unsigned indirect = reg->Register.Indirect;
+ const boolean indirect = reg->Register.Indirect;
const unsigned tempArrayId = get_temp_array_id(emit, file, index);
- const unsigned index2d = reg->Register.Dimension;
+ const boolean index2d = reg->Register.Dimension;
VGPU10OperandToken0 operand0;
if (file == TGSI_FILE_OUTPUT) {
{
enum tgsi_file_type file = reg->Register.File;
unsigned index = reg->Register.Index;
- const unsigned indirect = reg->Register.Indirect;
+ const boolean indirect = reg->Register.Indirect;
const unsigned tempArrayId = get_temp_array_id(emit, file, index);
- const unsigned index2d = reg->Register.Dimension;
+ const boolean index2d = reg->Register.Dimension;
const unsigned swizzleX = reg->Register.SwizzleX;
const unsigned swizzleY = reg->Register.SwizzleY;
const unsigned swizzleZ = reg->Register.SwizzleZ;
const unsigned swizzleW = reg->Register.SwizzleW;
- const unsigned absolute = reg->Register.Absolute;
- const unsigned negate = reg->Register.Negate;
+ const boolean absolute = reg->Register.Absolute;
+ const boolean negate = reg->Register.Negate;
bool is_prim_id = FALSE;
VGPU10OperandToken0 operand0;
*/
static void
emit_opcode(struct svga_shader_emitter_v10 *emit,
- unsigned vgpu10_opcode, boolean saturate)
+ VGPU10_OPCODE_TYPE vgpu10_opcode, boolean saturate)
{
VGPU10OpcodeToken0 token0;
/**
* Translate a TGSI property to VGPU10.
- * Don't emit any instructions yet, only need to gather the primitive property information.
- * The output primitive topology might be changed later. The final property instructions
- * will be emitted as part of the pre-helper code.
+ * Don't emit any instructions yet, only need to gather the primitive property
+ * information. The output primitive topology might be changed later. The
+ * final property instructions will be emitted as part of the pre-helper code.
*/
static boolean
emit_vgpu10_property(struct svga_shader_emitter_v10 *emit,
*/
static void
emit_input_declaration(struct svga_shader_emitter_v10 *emit,
- unsigned opcodeType, unsigned operandType,
- unsigned dim, unsigned index, unsigned size,
- unsigned name, unsigned numComp,
- unsigned selMode, unsigned usageMask,
- unsigned interpMode)
+ VGPU10_OPCODE_TYPE opcodeType,
+ VGPU10_OPERAND_TYPE operandType,
+ VGPU10_OPERAND_INDEX_DIMENSION dim,
+ unsigned index, unsigned size,
+ VGPU10_SYSTEM_NAME name,
+ VGPU10_OPERAND_NUM_COMPONENTS numComp,
+ VGPU10_OPERAND_4_COMPONENT_SELECTION_MODE selMode,
+ unsigned usageMask,
+ VGPU10_INTERPOLATION_MODE interpMode)
{
VGPU10OpcodeToken0 opcode0;
VGPU10OperandToken0 operand0;
*/
static void
emit_output_declaration(struct svga_shader_emitter_v10 *emit,
- unsigned type, unsigned index,
- unsigned name, unsigned usageMask)
+ VGPU10_OPCODE_TYPE type, unsigned index,
+ VGPU10_SYSTEM_NAME name,
+ unsigned usageMask)
{
VGPU10OpcodeToken0 opcode0;
VGPU10OperandToken0 operand0;
emit->sampler_target[unit] = decl->SamplerView.Resource;
/* Note: we can ignore YZW return types for now */
emit->sampler_return_type[unit] = decl->SamplerView.ReturnTypeX;
+ emit->sampler_view[unit] = TRUE;
}
return TRUE;
enum tgsi_semantic semantic_name = emit->info.input_semantic_name[i];
unsigned usage_mask = emit->info.input_usage_mask[i];
unsigned index = emit->linkage.input_map[i];
- unsigned type, interpolationMode, name;
+ VGPU10_OPCODE_TYPE type;
+ VGPU10_INTERPOLATION_MODE interpolationMode;
+ VGPU10_SYSTEM_NAME name;
if (usage_mask == 0)
continue; /* register is not actually used */
enum tgsi_semantic semantic_name = emit->info.input_semantic_name[i];
unsigned usage_mask = emit->info.input_usage_mask[i];
unsigned index = emit->linkage.input_map[i];
- unsigned opcodeType, operandType;
- unsigned numComp, selMode;
- unsigned name;
- unsigned dim;
+ VGPU10_OPCODE_TYPE opcodeType, operandType;
+ VGPU10_OPERAND_NUM_COMPONENTS numComp;
+ VGPU10_OPERAND_4_COMPONENT_SELECTION_MODE selMode;
+ VGPU10_SYSTEM_NAME name;
+ VGPU10_OPERAND_INDEX_DIMENSION dim;
if (usage_mask == 0)
continue; /* register is not actually used */
selMode = VGPU10_OPERAND_4_COMPONENT_MASK_MODE;
name = VGPU10_NAME_UNDEFINED;
- /* all geometry shader inputs are two dimensional except gl_PrimitiveID */
+ /* all geometry shader inputs are two dimensional except
+ * gl_PrimitiveID
+ */
dim = VGPU10_OPERAND_INDEX_2D;
if (semantic_name == TGSI_SEMANTIC_PRIMID) {
}
else {
/* VS or GS */
- unsigned name, type;
+ VGPU10_COMPONENT_NAME name;
+ VGPU10_OPCODE_TYPE type;
unsigned writemask = VGPU10_OPERAND_4_COMPONENT_MASK_ALL;
switch (semantic_name) {
for (i = 0; i < emit->num_samplers; i++) {
- /* Texcoord scale factors for RECT textures */
- if (emit->key.tex[i].unnormalized) {
- emit->texcoord_scale_index[i] = total_consts++;
- }
+ if (emit->sampler_view[i]) {
+
+ /* Texcoord scale factors for RECT textures */
+ if (emit->key.tex[i].unnormalized) {
+ emit->texcoord_scale_index[i] = total_consts++;
+ }
- /* Texture buffer sizes */
- if (emit->sampler_target[i] == TGSI_TEXTURE_BUFFER) {
- emit->texture_buffer_size_index[i] = total_consts++;
+ /* Texture buffer sizes */
+ if (emit->sampler_target[i] == TGSI_TEXTURE_BUFFER) {
+ emit->texture_buffer_size_index[i] = total_consts++;
+ }
}
}
static void
emit_instruction_op1(struct svga_shader_emitter_v10 *emit,
- unsigned opcode,
+ VGPU10_OPCODE_TYPE opcode,
const struct tgsi_full_dst_register *dst,
const struct tgsi_full_src_register *src,
boolean saturate)
static void
emit_instruction_op2(struct svga_shader_emitter_v10 *emit,
- unsigned opcode,
+ VGPU10_OPCODE_TYPE opcode,
const struct tgsi_full_dst_register *dst,
const struct tgsi_full_src_register *src1,
const struct tgsi_full_src_register *src2,
static void
emit_instruction_op3(struct svga_shader_emitter_v10 *emit,
- unsigned opcode,
+ VGPU10_OPCODE_TYPE opcode,
const struct tgsi_full_dst_register *dst,
const struct tgsi_full_src_register *src1,
const struct tgsi_full_src_register *src2,
{
unsigned index = inst->Dst[0].Register.Index;
struct tgsi_full_dst_register dst;
- unsigned opcode;
+ VGPU10_OPCODE_TYPE opcode;
assert(index < MAX_VGPU10_ADDR_REGS);
dst = make_dst_temp_reg(emit->address_reg_index[index]);
}
-/**
- * Emit code for TGSI_OPCODE_SCS instruction.
- */
-static boolean
-emit_scs(struct svga_shader_emitter_v10 *emit,
- const struct tgsi_full_instruction *inst)
-{
- /* dst.x = cos(src.x)
- * dst.y = sin(src.x)
- * dst.z = 0.0
- * dst.w = 1.0
- */
- struct tgsi_full_dst_register dst_x =
- writemask_dst(&inst->Dst[0], TGSI_WRITEMASK_X);
- struct tgsi_full_dst_register dst_y =
- writemask_dst(&inst->Dst[0], TGSI_WRITEMASK_Y);
- struct tgsi_full_dst_register dst_zw =
- writemask_dst(&inst->Dst[0], TGSI_WRITEMASK_ZW);
-
- struct tgsi_full_src_register zero_one =
- make_immediate_reg_float4(emit, 0.0f, 0.0f, 0.0f, 1.0f);
-
- begin_emit_instruction(emit);
- emit_opcode(emit, VGPU10_OPCODE_SINCOS, inst->Instruction.Saturate);
- emit_dst_register(emit, &dst_y);
- emit_dst_register(emit, &dst_x);
- emit_src_register(emit, &inst->Src[0]);
- end_emit_instruction(emit);
-
- emit_instruction_op1(emit, VGPU10_OPCODE_MOV,
- &dst_zw, &zero_one, inst->Instruction.Saturate);
-
- return TRUE;
-}
-
-
/**
* Emit code for TGSI_OPCODE_SEQ (Set Equal) instruction.
*/
const struct tgsi_full_src_register *coord)
{
struct tgsi_full_src_register coord_src_ref;
- unsigned component;
+ int component;
assert(tgsi_is_shadow_target(target));
- assert(target != TGSI_TEXTURE_SHADOWCUBE_ARRAY); /* XXX not implemented */
- if (target == TGSI_TEXTURE_SHADOW2D_ARRAY ||
- target == TGSI_TEXTURE_SHADOWCUBE)
- component = TGSI_SWIZZLE_W;
- else
- component = TGSI_SWIZZLE_Z;
+ component = tgsi_util_get_shadow_ref_src_index(target) % 4;
+ assert(component >= 0);
coord_src_ref = scalar_src(coord, component);
}
swz->inst_dst = &inst->Dst[0];
swz->coord_src = &inst->Src[0];
+
+ emit->fs.shadow_compare_units |= shadow_compare << unit;
}
assert(emit->unit == PIPE_SHADER_FRAGMENT);
- switch (swz->texture_target) {
- case TGSI_TEXTURE_SHADOW2D:
- case TGSI_TEXTURE_SHADOWRECT:
- case TGSI_TEXTURE_SHADOW1D_ARRAY:
- coord_src = scalar_src(swz->coord_src, TGSI_SWIZZLE_Z);
- break;
- case TGSI_TEXTURE_SHADOW1D:
- coord_src = scalar_src(swz->coord_src, TGSI_SWIZZLE_Y);
- break;
- case TGSI_TEXTURE_SHADOWCUBE:
- case TGSI_TEXTURE_SHADOW2D_ARRAY:
- coord_src = scalar_src(swz->coord_src, TGSI_SWIZZLE_W);
- break;
- default:
- assert(!"Unexpected texture target in end_tex_swizzle()");
- coord_src = scalar_src(swz->coord_src, TGSI_SWIZZLE_Z);
- }
+ int component =
+ tgsi_util_get_shadow_ref_src_index(swz->texture_target) % 4;
+ assert(component >= 0);
+ coord_src = scalar_src(swz->coord_src, component);
/* COMPARE tmp, coord, texel */
- /* XXX it would seem that the texel and coord arguments should
- * be transposed here, but piglit tests indicate otherwise.
- */
emit_comparison(emit, compare_func,
- &swz->tmp_dst, &texel_src, &coord_src);
+ &swz->tmp_dst, &coord_src, &texel_src);
/* AND dest, tmp, {1.0} */
begin_emit_instruction(emit);
const struct tgsi_full_instruction *inst)
{
const unsigned unit = inst->Src[1].Register.Index;
- const unsigned target = inst->Texture.Texture;
+ const enum tgsi_texture_type target = inst->Texture.Texture;
boolean valid = TRUE;
if (tgsi_is_shadow_target(target) &&
const struct tgsi_full_instruction *inst)
{
const uint unit = inst->Src[1].Register.Index;
- unsigned target = inst->Texture.Texture;
- unsigned opcode;
+ const enum tgsi_texture_type target = inst->Texture.Texture;
+ VGPU10_OPCODE_TYPE opcode;
struct tgsi_full_src_register coord;
int offsets[3];
struct tex_swizzle_info swz_info;
const struct tgsi_full_instruction *inst)
{
const uint unit = inst->Src[1].Register.Index;
- unsigned target = inst->Texture.Texture;
- unsigned opcode;
+ const enum tgsi_texture_type target = inst->Texture.Texture;
+ VGPU10_OPCODE_TYPE opcode;
int offsets[3];
unsigned tmp = get_temp_index(emit);
struct tgsi_full_src_register tmp_src = make_src_temp_reg(tmp);
const struct tgsi_full_instruction *inst)
{
const uint unit = inst->Src[3].Register.Index;
- unsigned target = inst->Texture.Texture;
+ const enum tgsi_texture_type target = inst->Texture.Texture;
int offsets[3];
struct tgsi_full_src_register coord;
struct tex_swizzle_info swz_info;
emit_txl_txb(struct svga_shader_emitter_v10 *emit,
const struct tgsi_full_instruction *inst)
{
- unsigned target = inst->Texture.Texture;
- unsigned opcode, unit;
+ const enum tgsi_texture_type target = inst->Texture.Texture;
+ VGPU10_OPCODE_TYPE opcode;
+ unsigned unit;
int offsets[3];
struct tgsi_full_src_register coord, lod_bias;
struct tex_swizzle_info swz_info;
emit_simple(struct svga_shader_emitter_v10 *emit,
const struct tgsi_full_instruction *inst)
{
- const unsigned opcode = inst->Instruction.Opcode;
+ const enum tgsi_opcode opcode = inst->Instruction.Opcode;
const struct tgsi_opcode_info *op = tgsi_get_opcode_info(opcode);
unsigned i;
begin_emit_instruction(emit);
- emit_opcode(emit, translate_opcode(inst->Instruction.Opcode),
- inst->Instruction.Saturate);
+ emit_opcode(emit, translate_opcode(opcode), inst->Instruction.Saturate);
for (i = 0; i < op->num_dst; i++) {
emit_dst_register(emit, &inst->Dst[i]);
}
unsigned dst_count,
unsigned dst_index)
{
- const unsigned opcode = inst->Instruction.Opcode;
+ const enum tgsi_opcode opcode = inst->Instruction.Opcode;
const struct tgsi_opcode_info *op = tgsi_get_opcode_info(opcode);
unsigned i;
begin_emit_instruction(emit);
- emit_opcode(emit, translate_opcode(inst->Instruction.Opcode),
- inst->Instruction.Saturate);
+ emit_opcode(emit, translate_opcode(opcode), inst->Instruction.Saturate);
for (i = 0; i < dst_count; i++) {
if (i == dst_index) {
unsigned inst_number,
const struct tgsi_full_instruction *inst)
{
- const unsigned opcode = inst->Instruction.Opcode;
+ const enum tgsi_opcode opcode = inst->Instruction.Opcode;
switch (opcode) {
case TGSI_OPCODE_ADD:
return emit_rsq(emit, inst);
case TGSI_OPCODE_SAMPLE:
return emit_sample(emit, inst);
- case TGSI_OPCODE_SCS:
- return emit_scs(emit, inst);
case TGSI_OPCODE_SEQ:
return emit_seq(emit, inst);
case TGSI_OPCODE_SGE:
svga_tgsi_vgpu10_translate(struct svga_context *svga,
const struct svga_shader *shader,
const struct svga_compile_key *key,
- unsigned unit)
+ enum pipe_shader_type unit)
{
struct svga_shader_variant *variant = NULL;
struct svga_shader_emitter_v10 *emit;
*/
variant->uses_flat_interp = emit->uses_flat_interp;
+ variant->fs_shadow_compare_units = emit->fs.shadow_compare_units;
+
if (tokens != shader->tokens) {
tgsi_free_tokens(tokens);
}
projects / mesa.git / blobdiff