intel/assembler: Add labels support

[mesa.git] / src / intel / compiler / brw_inst.h

diff --git a/src/intel/compiler/brw_inst.h b/src/intel/compiler/brw_inst.h
index fdc6cd762259438be7b9c8def082997d03dd6eb1..550dfb0db49cfcaa55c8718718565652c4631f4e 100644 (file)
--- a/src/intel/compiler/brw_inst.h
+++ b/src/intel/compiler/brw_inst.h
@@ -1031,8 +1031,8 @@ F(rt_message_type,     /* 4+ */ MD(10),  MD( 8), /* 12+ */ MD12(10), MD12(8))
  * Thread Spawn message function control bits:
  *  @{
  */
-F(ts_resource_select,  /* 4+ */ MD( 4),  MD( 4), /* 12+ */ -1, -1)
-F(ts_request_type,     /* 4+ */ MD( 1),  MD( 1), /* 12+ */ -1, -1)
+FC(ts_resource_select,  /* 4+ */ MD( 4),  MD( 4), /* 12+ */ -1, -1, devinfo->gen < 11)
+FC(ts_request_type,     /* 4+ */ MD( 1),  MD( 1), /* 12+ */ -1, -1, devinfo->gen < 11)
 F(ts_opcode,           /* 4+ */ MD( 0),  MD( 0), /* 12+ */ MD12(0), MD12(0))
 /** @} */
 
@@ -1136,7 +1136,13 @@ brw_inst_set_imm_df(const struct gen_device_info *devinfo,
    } dt;
    (void) devinfo;
    dt.d = value;
-   brw_inst_set_bits(insn, 127, 64, dt.u);
+
+   if (devinfo->gen >= 12) {
+      brw_inst_set_bits(insn, 95, 64, dt.u >> 32);
+      brw_inst_set_bits(insn, 127, 96, dt.u & 0xFFFFFFFF);
+   } else {
+      brw_inst_set_bits(insn, 127, 64, dt.u);
+   }
 }
 
 static inline void
@@ -1144,7 +1150,12 @@ brw_inst_set_imm_uq(const struct gen_device_info *devinfo,
                     brw_inst *insn, uint64_t value)
 {
    (void) devinfo;
-   brw_inst_set_bits(insn, 127, 64, value);
+   if (devinfo->gen >= 12) {
+      brw_inst_set_bits(insn, 95, 64, value >> 32);
+      brw_inst_set_bits(insn, 127, 96, value & 0xFFFFFFFF);
+   } else {
+      brw_inst_set_bits(insn, 127, 64, value);
+   }
 }
 
 /** @} */
@@ -1262,6 +1273,7 @@ BRW_IA16_ADDR_IMM(send_dst,    -1, -1,  62,  56,  52)
 static inline uint64_t
 brw_inst_bits(const brw_inst *inst, unsigned high, unsigned low)
 {
+   assert(high < 128);
    assert(high >= low);
    /* We assume the field doesn't cross 64-bit boundaries. */
    const unsigned word = high / 64;
@@ -1283,6 +1295,7 @@ brw_inst_bits(const brw_inst *inst, unsigned high, unsigned low)
 static inline void
 brw_inst_set_bits(brw_inst *inst, unsigned high, unsigned low, uint64_t value)
 {
+   assert(high < 128);
    assert(high >= low);
    const unsigned word = high / 64;
    assert(word == low / 64);
@@ -1386,6 +1399,18 @@ FC(swsb,            /* 4+ */ -1, -1, /* 12+ */ 15,  8, devinfo->gen >= 12)
 F(debug_control,    /* 4+ */  7,  7, /* 12+ */  7,  7)
 F(hw_opcode,        /* 4+ */  6,  0, /* 12+ */  6,  0) /* Same location as brw_inst */
 
+static inline unsigned
+brw_compact_inst_imm(const struct gen_device_info *devinfo,
+                     const brw_compact_inst *inst)
+{
+   if (devinfo->gen >= 12) {
+      return brw_compact_inst_bits(inst, 63, 52);
+   } else {
+      return (brw_compact_inst_bits(inst, 39, 35) << 8) |
+             (brw_compact_inst_bits(inst, 63, 56));
+   }
+}
+
 /**
  * (Gen8+) Compacted three-source instructions:
  *  @{