intel/ir: Allow representing additional flag subregisters in the IR.

[mesa.git] / src / intel / compiler / brw_reg.h

diff --git a/src/intel/compiler/brw_reg.h b/src/intel/compiler/brw_reg.h
index 17d5b97bf31fce1c11497fa5950e29b4fd0e3f10..c41408104fa54c1375503d002e64652cbcac0936 100644 (file)
--- a/src/intel/compiler/brw_reg.h
+++ b/src/intel/compiler/brw_reg.h
@@ -842,6 +842,13 @@ brw_flag_reg(int reg, int subreg)
                       BRW_ARF_FLAG + reg, subreg);
 }
 
+static inline struct brw_reg
+brw_flag_subreg(unsigned subreg)
+{
+   return brw_uw1_reg(BRW_ARCHITECTURE_REGISTER_FILE,
+                      BRW_ARF_FLAG + subreg / 2, subreg % 2);
+}
+
 /**
  * Return the mask register present in Gen4-5, or the related register present
  * in Gen7.5 and later hardware referred to as "channel enable" register in