intel/ir: Allow representing additional flag subregisters in the IR.

[mesa.git] / src / intel / compiler / brw_shader.h

diff --git a/src/intel/compiler/brw_shader.h b/src/intel/compiler/brw_shader.h
index 06abdc4d1754a5595f169437ec4b75f8a7e56b72..fd02feb9107a711f1185fdf5d50d3e1b4e3a1330 100644 (file)
--- a/src/intel/compiler/brw_shader.h
+++ b/src/intel/compiler/brw_shader.h
@@ -169,10 +169,10 @@ struct backend_instruction {
    bool shadow_compare:1;
    bool eot:1;
 
-   /* Chooses which flag subregister (f0.0 or f0.1) is used for conditional
+   /* Chooses which flag subregister (f0.0 to f1.1) is used for conditional
     * mod and predication.
     */
-   unsigned flag_subreg:1;
+   unsigned flag_subreg:2;
 
    /** The number of hardware registers used for a message header. */
    uint8_t header_size;